Unverified Commit 73d1774e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v5.14-rockchip-dts64-1' of... 

Merge tag 'v5.14-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

A lot of dt-yaml related fixes; PCIe, USB and pwm-fans for Helios64;
Display rotation and audio codec for the Odroid Go Advance;
IR, spdif and usb-c support for rk3399-firefly;
USB support for rk3308 and some rk3328 boards and setting
the PCIe link speed to actually only supported speed on rk3399.

* tag 'v5.14-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (30 commits)
  arm64: dts: rockchip: Re-add regulator-always-on for vcc_sdio for rk3399-roc-pc
  arm64: dts: rockchip: Re-add regulator-boot-on, regulator-always-on for vdd_gpu on rk3399-roc-pc
  arm64: dts: rockchip: add ir-receiver for rk3399-roc-pc
  arm64: dts: rockchip: Add USB-C port details for rk3399 Firefly
  arm64: dts: rockchip: Sort rk3399 firefly pinmux entries
  arm64: dts: rockchip: add infrared receiver node to RK3399 Firefly
  arm64: dts: rockchip: add SPDIF node for rk3399-firefly
  arm64: dts: rockchip: Add Rotation Property for OGA Panel
  arm64: dts: rockchip: Add support for USB on helios64
  arm64: dts: rockchip: add USB support to rk3308.dtsi
  arm64: dts: rockchip: rename nodename for phy-rockchip-inno-usb2
  arm64: dts: rockchip: add rk817 codec to Odroid Go
  arm64: dts: rename grf-gpio nodename in rk3328.dtsi
  arm64: dts: rockchip: Add support for PCIe on helios64
  arm64: dts: rockchip: Add support for two PWM fans on helios64
  arm64: dts: rockchip: fix regulator-gpio states array
  arm64: dts: rockchip: add #power-domain-cells to power domain nodes
  arm64: dts: rockchip: Fix power-controller node names for rk3399
  arm64: dts: rockchip: Fix power-controller node names for rk3328
  arm64: dts: rockchip: Fix power-controller node names for px30
  ...

Link: https://lore.kernel.org/r/2796982.e9J7NaK4W3@phil


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents f82c6e6d eb607cd4

arch/arm64/boot/dts/rockchip/px30.dtsi

+17 −11
Original line number Diff line number Diff line
@@ -244,28 +244,31 @@ power: power-controller { 
			#size-cells = <0>;



			/* These power domains are grouped by VD_LOGIC */

			pd_usb@PX30_PD_USB {

			power-domain@PX30_PD_USB {

				reg = <PX30_PD_USB>;

				clocks = <&cru HCLK_HOST>,

					 <&cru HCLK_OTG>,

					 <&cru SCLK_OTG_ADP>;

				pm_qos = <&qos_usb_host>, <&qos_usb_otg>;

				#power-domain-cells = <0>;

			};

			pd_sdcard@PX30_PD_SDCARD {

			power-domain@PX30_PD_SDCARD {

				reg = <PX30_PD_SDCARD>;

				clocks = <&cru HCLK_SDMMC>,

					 <&cru SCLK_SDMMC>;

				pm_qos = <&qos_sdmmc>;

				#power-domain-cells = <0>;

			};

			pd_gmac@PX30_PD_GMAC {

			power-domain@PX30_PD_GMAC {

				reg = <PX30_PD_GMAC>;

				clocks = <&cru ACLK_GMAC>,

					 <&cru PCLK_GMAC>,

					 <&cru SCLK_MAC_REF>,

					 <&cru SCLK_GMAC_RX_TX>;

				pm_qos = <&qos_gmac>;

				#power-domain-cells = <0>;

			};

			pd_mmc_nand@PX30_PD_MMC_NAND {

			power-domain@PX30_PD_MMC_NAND {

				reg = <PX30_PD_MMC_NAND>;

				clocks =  <&cru HCLK_NANDC>,

					  <&cru HCLK_EMMC>,
@@ -277,15 +280,17 @@ pd_mmc_nand@PX30_PD_MMC_NAND { 
					  <&cru SCLK_SFC>;

				pm_qos = <&qos_emmc>, <&qos_nand>,

					 <&qos_sdio>, <&qos_sfc>;

				#power-domain-cells = <0>;

			};

			pd_vpu@PX30_PD_VPU {

			power-domain@PX30_PD_VPU {

				reg = <PX30_PD_VPU>;

				clocks = <&cru ACLK_VPU>,

					 <&cru HCLK_VPU>,

					 <&cru SCLK_CORE_VPU>;

				pm_qos = <&qos_vpu>, <&qos_vpu_r128>;

				#power-domain-cells = <0>;

			};

			pd_vo@PX30_PD_VO {

			power-domain@PX30_PD_VO {

				reg = <PX30_PD_VO>;

				clocks = <&cru ACLK_RGA>,

					 <&cru ACLK_VOPB>,
@@ -300,8 +305,9 @@ pd_vo@PX30_PD_VO { 
					 <&cru SCLK_VOPB_PWM>;

				pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,

					 <&qos_vop_m0>, <&qos_vop_m1>;

				#power-domain-cells = <0>;

			};

			pd_vi@PX30_PD_VI {

			power-domain@PX30_PD_VI {

				reg = <PX30_PD_VI>;

				clocks = <&cru ACLK_CIF>,

					 <&cru ACLK_ISP>,
@@ -311,11 +317,13 @@ pd_vi@PX30_PD_VI { 
				pm_qos = <&qos_isp_128>, <&qos_isp_rd>,

					 <&qos_isp_wr>, <&qos_isp_m1>,

					 <&qos_vip>;

				#power-domain-cells = <0>;

			};

			pd_gpu@PX30_PD_GPU {

			power-domain@PX30_PD_GPU {

				reg = <PX30_PD_GPU>;

				clocks = <&cru SCLK_GPU>;

				pm_qos = <&qos_gpu>;

				#power-domain-cells = <0>;

			};

		};

	};
@@ -814,7 +822,7 @@ usb2phy_grf: syscon@ff2c0000 { 
		#address-cells = <1>;

		#size-cells = <1>;



		u2phy: usb2-phy@100 {

		u2phy: usb2phy@100 {

			compatible = "rockchip,px30-usb2phy";

			reg = <0x100 0x20>;

			clocks = <&pmucru SCLK_USBPHY_REF>;
@@ -1087,7 +1095,6 @@ vopb_mmu: iommu@ff460f00 { 
		compatible = "rockchip,iommu";

		reg = <0x0 0xff460f00 0x0 0x100>;

		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vopb_mmu";

		clocks = <&cru ACLK_VOPB>, <&cru HCLK_VOPB>;

		clock-names = "aclk", "iface";

		power-domains = <&power PX30_PD_VO>;
@@ -1128,7 +1135,6 @@ vopl_mmu: iommu@ff470f00 { 
		compatible = "rockchip,iommu";

		reg = <0x0 0xff470f00 0x0 0x100>;

		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vopl_mmu";

		clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;

		clock-names = "aclk", "iface";

		power-domains = <&power PX30_PD_VO>;

arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts

+2 −2
Original line number Diff line number Diff line
@@ -84,8 +84,8 @@ vcc_sdmmc: vcc-sdmmc { 
		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;

		gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;

		states = <1800000 0x0

			  3300000 0x1>;

		states = <1800000 0x0>,

			 <3300000 0x1>;

		vin-supply = <&vcc5v0_sys>;

	};

arch/arm64/boot/dts/rockchip/rk3308.dtsi

+73 −1
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@ xin24m: xin24m { 


	grf: grf@ff000000 {

		compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";

		reg = <0x0 0xff000000 0x0 0x10000>;

		reg = <0x0 0xff000000 0x0 0x08000>;



		reboot-mode {

			compatible = "syscon-reboot-mode";
@@ -177,6 +177,42 @@ reboot-mode { 
		};

	};



	usb2phy_grf: syscon@ff008000 {

		compatible = "rockchip,rk3308-usb2phy-grf", "syscon", "simple-mfd";

		reg = <0x0 0xff008000 0x0 0x4000>;

		#address-cells = <1>;

		#size-cells = <1>;



		u2phy: usb2phy@100 {

			compatible = "rockchip,rk3308-usb2phy";

			reg = <0x100 0x10>;

			assigned-clocks = <&cru USB480M>;

			assigned-clock-parents = <&u2phy>;

			clocks = <&cru SCLK_USBPHY_REF>;

			clock-names = "phyclk";

			clock-output-names = "usb480m_phy";

			#clock-cells = <0>;

			status = "disabled";



			u2phy_otg: otg-port {

				interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "otg-bvalid", "otg-id",

						  "linestate";

				#phy-cells = <0>;

				status = "disabled";

			};



			u2phy_host: host-port {

				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;

				interrupt-names = "linestate";

				#phy-cells = <0>;

				status = "disabled";

			};

		};

	};



	detect_grf: syscon@ff00b000 {

		compatible = "rockchip,rk3308-detect-grf", "syscon", "simple-mfd";

		reg = <0x0 0xff00b000 0x0 0x1000>;
@@ -579,6 +615,42 @@ spdif_tx: spdif-tx@ff3a0000 { 
		status = "disabled";

	};



	usb20_otg: usb@ff400000 {

		compatible = "rockchip,rk3308-usb", "rockchip,rk3066-usb",

			     "snps,dwc2";

		reg = <0x0 0xff400000 0x0 0x40000>;

		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_OTG>;

		clock-names = "otg";

		dr_mode = "otg";

		g-np-tx-fifo-size = <16>;

		g-rx-fifo-size = <280>;

		g-tx-fifo-size = <256 128 128 64 32 16>;

		phys = <&u2phy_otg>;

		phy-names = "usb2-phy";

		status = "disabled";

	};



	usb_host_ehci: usb@ff440000 {

		compatible = "generic-ehci";

		reg = <0x0 0xff440000 0x0 0x10000>;

		interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>;

		phys = <&u2phy_host>;

		phy-names = "usb";

		status = "disabled";

	};



	usb_host_ohci: usb@ff450000 {

		compatible = "generic-ohci";

		reg = <0x0 0xff450000 0x0 0x10000>;

		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>;

		phys = <&u2phy_host>;

		phy-names = "usb";

		status = "disabled";

	};



	sdmmc: mmc@ff480000 {

		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";

		reg = <0x0 0xff480000 0x0 0x4000>;

arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts

+35 −2
Original line number Diff line number Diff line
@@ -165,6 +165,31 @@ blue_led: led-0 { 
		};

	};



	rk817-sound {

		compatible = "simple-audio-card";

		simple-audio-card,name = "Analog";

		simple-audio-card,format = "i2s";

		simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;

		simple-audio-card,mclk-fs = <256>;

		simple-audio-card,widgets =

			"Microphone", "Mic Jack",

			"Headphone", "Headphones",

			"Speaker", "Speaker";

		simple-audio-card,routing =

			"MICL", "Mic Jack",

			"Headphones", "HPOL",

			"Headphones", "HPOR",

			"Speaker", "SPKO";



		simple-audio-card,codec {

			sound-dai = <&rk817>;

		};



		simple-audio-card,cpu {

			sound-dai = <&i2s1_2ch>;

		};

	};



	vccsys: vccsys {

		compatible = "regulator-fixed";

		regulator-name = "vcc3v8_sys";
@@ -239,6 +264,7 @@ panel@0 { 
		backlight = <&backlight>;

		iovcc-supply = <&vcc_lcd>;

		reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;

		rotation = <270>;

		vdd-supply = <&vcc_lcd>;



		port {
@@ -269,11 +295,14 @@ rk817: pmic@20 { 
		reg = <0x20>;

		interrupt-parent = <&gpio0>;

		interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;

		clock-output-names = "rk808-clkout1", "xin32k";

		clock-names = "mclk";

		clocks = <&cru SCLK_I2S1_OUT>;

		pinctrl-names = "default";

		pinctrl-0 = <&pmic_int>;

		pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;

		wakeup-source;

		#clock-cells = <1>;

		clock-output-names = "rk808-clkout1", "xin32k";

		#sound-dai-cells = <0>;



		vcc1-supply = <&vccsys>;

		vcc2-supply = <&vccsys>;
@@ -432,6 +461,10 @@ regulator-state-mem { 
				};

			};

		};



		rk817_codec: codec {

			rockchip,mic-in-differential;

		};

	};

};

arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts

+34 −2
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ / { 
	compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";



	aliases {

		ethernet1 = &rtl8153;

		mmc0 = &sdmmc;

	};
@@ -76,8 +77,8 @@ vcc_io_sdio: sdmmcio-regulator { 
		regulator-settling-time-us = <5000>;

		regulator-type = "voltage";

		startup-delay-us = <2000>;

		states = <1800000 0x1

			  3300000 0x0>;

		states = <1800000 0x1>,

			 <3300000 0x0>;

		vin-supply = <&vcc_io_33>;

	};
@@ -101,6 +102,18 @@ vdd_5v: vdd-5v { 
		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

	};



	vdd_5v_lan: vdd-5v-lan {

		compatible = "regulator-fixed";

		enable-active-high;

		gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;

		pinctrl-0 = <&lan_vdd_pin>;

		pinctrl-names = "default";

		regulator-name = "vdd_5v_lan";

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vdd_5v>;

	};

};



&cpu0 {
@@ -309,6 +322,12 @@ wan_led_pin: wan-led-pin { 
		};

	};



	lan {

		lan_vdd_pin: lan-vdd-pin {

			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	pmic {

		pmic_int_l: pmic-int-l {

			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -368,6 +387,19 @@ &usb20_otg { 
	dr_mode = "host";

};



&usbdrd3 {

	dr_mode = "host";

	status = "okay";

	#address-cells = <1>;

	#size-cells = <0>;



	/* Second port is for USB 3.0 */

	rtl8153: device@2 {

		compatible = "usbbda,8153";

		reg = <2>;

	};

};



&usb_host0_ehci {

	status = "okay";

};