Commit 73d5fc92 authored by Nishad Saraf's avatar Nishad Saraf Committed by Vinod Koul
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dmaengine: amd: qdma: Add AMD QDMA driver 

Adds driver to enable PCIe board which uses AMD QDMA (the Queue-based
Direct Memory Access) subsystem. For example, Xilinx Alveo V70 AI
Accelerator devices.
    https://www.xilinx.com/applications/data-center/v70.html

The QDMA subsystem is used in conjunction with the PCI Express IP block
to provide high performance data transfer between host memory and the
card's DMA subsystem.

            +-------+       +-------+       +-----------+
   PCIe     |       |       |       |       |           |
   Tx/Rx    |       |       |       |  AXI  |           |
 <=======>  | PCIE  | <===> | QDMA  | <====>| User Logic|
            |       |       |       |       |           |
            +-------+       +-------+       +-----------+

The primary mechanism to transfer data using the QDMA is for the QDMA
engine to operate on instructions (descriptors) provided by the host
operating system. Using the descriptors, the QDMA can move data in both
the Host to Card (H2C) direction, or the Card to Host (C2H) direction.
The QDMA provides a per-queue basis option whether DMA traffic goes
to an AXI4 memory map (MM) interface or to an AXI4-Stream interface.

The hardware detail is provided by
    https://docs.xilinx.com/r/en-US/pg302-qdma



Implements dmaengine APIs to support MM DMA transfers.
- probe the available DMA channels
- use dma_slave_map for channel lookup
- use virtual channel to manage dmaengine tx descriptors
- implement device_prep_slave_sg callback to handle host scatter gather
  list

Signed-off-by: default avatarNishad Saraf <nishads@amd.com>
Signed-off-by: default avatarLizhi Hou <lizhi.hou@amd.com>
Link: https://lore.kernel.org/r/20240819211948.688786-2-lizhi.hou@amd.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 51c42ae3

MAINTAINERS

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@@ -1128,6 +1128,14 @@ L: dmaengine@vger.kernel.org 
S:	Maintained

F:	drivers/dma/ptdma/









AMD QDMA DRIVER









M:	Nishad Saraf <nishads@amd.com>









M:	Lizhi Hou <lizhi.hou@amd.com>









L:	dmaengine@vger.kernel.org









S:	Supported









F:	drivers/dma/amd/qdma/









F:	include/linux/platform_data/amd_qdma.h

















AMD SEATTLE DEVICE TREE SUPPORT









M:	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>









M:	Tom Lendacky <thomas.lendacky@amd.com>
































drivers/dma/Kconfig



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@@ -716,6 +716,8 @@ config XILINX_ZYNQMP_DPDMA







	  display driver.



















# driver files









source "drivers/dma/amd/Kconfig"



















source "drivers/dma/bestcomm/Kconfig"



















source "drivers/dma/mediatek/Kconfig"
































drivers/dma/Makefile



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@@ -83,6 +83,7 @@ obj-$(CONFIG_ST_FDMA) += st_fdma.o







obj-$(CONFIG_FSL_DPAA2_QDMA) += fsl-dpaa2-qdma/









obj-$(CONFIG_INTEL_LDMA) += lgm/



















obj-y += amd/









obj-y += mediatek/









obj-y += qcom/









obj-y += stm32/
































drivers/dma/amd/Kconfig
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# SPDX-License-Identifier: GPL-2.0-only



















config AMD_QDMA









	tristate "AMD Queue-based DMA"









	depends on HAS_IOMEM









	select DMA_ENGINE









	select DMA_VIRTUAL_CHANNELS









	select REGMAP_MMIO









	help









	  Enable support for the AMD Queue-based DMA subsystem. The primary









	  mechanism to transfer data using the QDMA is for the QDMA engine to









	  operate on instructions (descriptors) provided by the host operating









	  system. Using the descriptors, the QDMA can move data in either the









	  Host to Card (H2C) direction or the Card to Host (C2H) direction.
























drivers/dma/amd/Makefile
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# SPDX-License-Identifier: GPL-2.0



















obj-$(CONFIG_AMD_QDMA) += qdma/