Commit 746e195d authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

Merge tag 'riscv-dt-for-v7.1' of... 

Merge tag 'riscv-dt-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/conor/linux

 into soc/dt

RISC-V devicetrees for v7.1

Generic:
Add binding coverage for Supm.

Microchip:
Add support for the picgx64 and its curiosity board. This is a PolarFire
SoC without the FPGA.
Add the missing tsu_clk for ptp on the macb on PolarFire SoC and resolve
a long-running problem with gpio interrupts being incorrectly described
on the platform.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/conor/linux

:
  riscv: dts: microchip: update mpfs gpio interrupts to better match the SoC
  riscv: dts: microchip: add tsu clock to macb on mpfs
  dt-bindings: riscv: Add Supm extension description
  riscv: dts: microchip: remove POLARFIRE mention in Makefile
  riscv: dts: microchip: add pic64gx and its curiosity kit
  dt-bindings: riscv: microchip: document the PIC64GX curiosity kit
  dt-bindings: timer: sifive,clint: add pic64gx compatibility
  riscv: dts: microchip: add pinctrl nodes for mpfs/icicle kit

Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parents 17ed8fd2 b0258f69

Documentation/devicetree/bindings/riscv/extensions.yaml

+27 −0
Original line number Diff line number Diff line
@@ -262,6 +262,23 @@ properties: 
            ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87

            ("Updated to ratified state.")



        - const: supm

          description: |

            The standard Supm extension for pointer masking support in user

            mode (U-mode) as ratified at commit d70011dde6c2 ("Update to

            ratified state") of riscv-j-extension.



            Supm represents a combination of underlying hardware capability

            (Smnpm or Ssnpm), U-mode consumer privilege level, and M/S-mode

            software configuration that enables pointer masking for U-mode.



            DO NOT include this property in device trees targeting privileged

            system software (S-mode or M-mode).



            This property is only appropriate in device trees provided to

            U-mode software where the next-higher-privilege-mode supports

            Smnpm or Ssnpm and enables it for U-mode.



        - const: svade

          description: |

            The standard Svade supervisor-level extension for SW-managed PTE A/D
@@ -907,6 +924,16 @@ properties: 
        then:

          contains:

            const: b

      # Supm depends on Smnpm or Ssnpm

      - if:

          contains:

            const: supm

        then:

          oneOf:

            - contains:

                const: smnpm

            - contains:

                const: ssnpm

      # Za64rs and Ziccrse depend on Zalrsc or A

      - if:

          contains:

Documentation/devicetree/bindings/riscv/microchip.yaml

+5 −2
Original line number Diff line number Diff line
@@ -4,14 +4,14 @@ 
$id: http://devicetree.org/schemas/riscv/microchip.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Microchip PolarFire SoC-based boards

title: Microchip SoC-based boards



maintainers:

  - Conor Dooley <conor.dooley@microchip.com>

  - Daire McNamara <daire.mcnamara@microchip.com>



description:

  Microchip PolarFire SoC-based boards

  Microchip SoC-based boards



properties:

  $nodename:
@@ -46,6 +46,9 @@ properties: 
              - microchip,mpfs-sev-kit

              - sundance,polarberry

          - const: microchip,mpfs

      - items:

          - const: microchip,pic64gx-curiosity-kit

          - const: microchip,pic64gx



additionalProperties: true

Documentation/devicetree/bindings/timer/sifive,clint.yaml

+1 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ properties: 
          - enum:

              - canaan,k210-clint       # Canaan Kendryte K210

              - eswin,eic7700-clint     # ESWIN EIC7700

              - microchip,pic64gx-clint # Microchip PIC64GX

              - sifive,fu540-c000-clint # SiFive FU540

              - spacemit,k1-clint       # SpacemiT K1

              - spacemit,k3-clint       # SpacemiT K3

arch/riscv/boot/dts/microchip/Makefile

+9 −8
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-disco-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit-prod.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
 
dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-beaglev-fire.dtb

dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-disco-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-icicle-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-icicle-kit-prod.dtb

dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-m100pfsevp.dtb

dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-polarberry.dtb

dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-sev-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP) += mpfs-tysom-m.dtb

dtb-$(CONFIG_ARCH_MICROCHIP) += pic64gx-curiosity-kit.dtb

arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts

+29 −0
Original line number Diff line number Diff line
@@ -164,6 +164,35 @@ imx219_0: endpoint { 
	};

};



&irqmux {

	interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,

			<3 &plic 16>, <4 &plic 17>, <5 &plic 18>,

			<6 &plic 19>, <7 &plic 20>, <8 &plic 21>,

			<9 &plic 22>, <10 &plic 23>, <11 &plic 24>,

			<12 &plic 25>, <13 &plic 26>,



			<32 &plic 27>, <33 &plic 28>, <34 &plic 29>,

			<35 &plic 30>, <36 &plic 31>, <37 &plic 32>,

			<38 &plic 33>, <39 &plic 34>, <40 &plic 35>,

			<41 &plic 36>, <42 &plic 37>, <43 &plic 38>,

			<44 &plic 39>, <45 &plic 40>, <46 &plic 41>,

			<47 &plic 42>, <48 &plic 43>, <49 &plic 44>,

			<50 &plic 45>, <51 &plic 46>, <52 &plic 47>,

			<53 &plic 48>, <54 &plic 49>, <55 &plic 50>,



			<64 &plic 53>, <65 &plic 53>, <66 &plic 53>,

			<67 &plic 53>, <68 &plic 53>, <69 &plic 53>,

			<70 &plic 53>, <71 &plic 53>, <72 &plic 53>,

			<73 &plic 53>, <74 &plic 53>, <75 &plic 53>,

			<76 &plic 53>, <77 &plic 53>, <78 &plic 53>,

			<79 &plic 53>, <80 &plic 53>, <81 &plic 53>,

			<82 &plic 53>, <83 &plic 53>, <84 &plic 53>,

			<85 &plic 53>, <86 &plic 53>, <87 &plic 53>,

			<88 &plic 53>, <89 &plic 53>, <90 &plic 53>,

			<91 &plic 53>, <92 &plic 53>, <93 &plic 53>,

			<94 &plic 53>, <95 &plic 53>;

};



&mac0 {

	status = "okay";

	phy-mode = "sgmii";