Commit 7470bfcf authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: add helper function for gfx queue/bitmap transition 



Similar to what we do for compute already.

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarJack Xiao <jack.xiao@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Acked-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e537c994

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+1 −1
Original line number Diff line number Diff line
@@ -159,7 +159,7 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) 


		/* remove the KIQ bit as well */

		if (adev->gfx.kiq.ring.sched.ready)

			clear_bit(amdgpu_gfx_queue_to_bit(adev,

			clear_bit(amdgpu_gfx_mec_queue_to_bit(adev,

							  adev->gfx.kiq.ring.me - 1,

							  adev->gfx.kiq.ring.pipe,

							  adev->gfx.kiq.ring.queue),

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+36 −6
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ 
 * GPU GFX IP block helpers function.

 */



int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev, int mec,

int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,

				int pipe, int queue)

{

	int bit = 0;
@@ -47,7 +47,7 @@ int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev, int mec, 
	return bit;

}



void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit,

void amdgpu_gfx_bit_to_mec_queue(struct amdgpu_device *adev, int bit,

				 int *mec, int *pipe, int *queue)

{

	*queue = bit % adev->gfx.mec.num_queue_per_pipe;
@@ -61,10 +61,40 @@ void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit, 
bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev,

				     int mec, int pipe, int queue)

{

	return test_bit(amdgpu_gfx_queue_to_bit(adev, mec, pipe, queue),

	return test_bit(amdgpu_gfx_mec_queue_to_bit(adev, mec, pipe, queue),

			adev->gfx.mec.queue_bitmap);

}



int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev,

			       int me, int pipe, int queue)

{

	int bit = 0;



	bit += me * adev->gfx.me.num_pipe_per_me

		* adev->gfx.me.num_queue_per_pipe;

	bit += pipe * adev->gfx.me.num_queue_per_pipe;

	bit += queue;



	return bit;

}



void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit,

				int *me, int *pipe, int *queue)

{

	*queue = bit % adev->gfx.me.num_queue_per_pipe;

	*pipe = (bit / adev->gfx.me.num_queue_per_pipe)

		% adev->gfx.me.num_pipe_per_me;

	*me = (bit / adev->gfx.me.num_queue_per_pipe)

		/ adev->gfx.me.num_pipe_per_me;

}



bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev,

				    int me, int pipe, int queue)

{

	return test_bit(amdgpu_gfx_me_queue_to_bit(adev, me, pipe, queue),

			adev->gfx.me.queue_bitmap);

}



/**

 * amdgpu_gfx_scratch_get - Allocate a scratch register

 *
@@ -237,7 +267,7 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev, 
		if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap))

			continue;



		amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);

		amdgpu_gfx_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);



		/*

		 * 1. Using pipes 2/3 from MEC 2 seems cause problems.

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

+10 −4
Original line number Diff line number Diff line
@@ -337,12 +337,18 @@ void amdgpu_gfx_compute_mqd_sw_fini(struct amdgpu_device *adev); 
void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev);

void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev);



int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev, int mec,

int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,

				int pipe, int queue);

void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit,

void amdgpu_gfx_bit_to_mec_queue(struct amdgpu_device *adev, int bit,

				 int *mec, int *pipe, int *queue);

bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, int mec,

				     int pipe, int queue);

int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev, int me,

			       int pipe, int queue);

void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit,

				int *me, int *pipe, int *queue);

bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me,

				    int pipe, int queue);

void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);



#endif

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+9 −9
Original line number Diff line number Diff line
@@ -6213,7 +6213,7 @@ static void gfx_v8_0_pipe_reserve_resources(struct amdgpu_device *adev, 
	struct amdgpu_ring *iring;



	mutex_lock(&adev->gfx.pipe_reserve_mutex);

	pipe = amdgpu_gfx_queue_to_bit(adev, ring->me, ring->pipe, 0);

	pipe = amdgpu_gfx_mec_queue_to_bit(adev, ring->me, ring->pipe, 0);

	if (acquire)

		set_bit(pipe, adev->gfx.pipe_reserve_bitmap);

	else
@@ -6232,7 +6232,7 @@ static void gfx_v8_0_pipe_reserve_resources(struct amdgpu_device *adev, 
		/* Lower all pipes without a current reservation */

		for (i = 0; i < adev->gfx.num_gfx_rings; ++i) {

			iring = &adev->gfx.gfx_ring[i];

			pipe = amdgpu_gfx_queue_to_bit(adev,

			pipe = amdgpu_gfx_mec_queue_to_bit(adev,

							   iring->me,

							   iring->pipe,

							   0);
@@ -6242,7 +6242,7 @@ static void gfx_v8_0_pipe_reserve_resources(struct amdgpu_device *adev, 


		for (i = 0; i < adev->gfx.num_compute_rings; ++i) {

			iring = &adev->gfx.compute_ring[i];

			pipe = amdgpu_gfx_queue_to_bit(adev,

			pipe = amdgpu_gfx_mec_queue_to_bit(adev,

							   iring->me,

							   iring->pipe,

							   0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+9 −9
Original line number Diff line number Diff line
@@ -4578,7 +4578,7 @@ static void gfx_v9_0_pipe_reserve_resources(struct amdgpu_device *adev, 
	struct amdgpu_ring *iring;



	mutex_lock(&adev->gfx.pipe_reserve_mutex);

	pipe = amdgpu_gfx_queue_to_bit(adev, ring->me, ring->pipe, 0);

	pipe = amdgpu_gfx_mec_queue_to_bit(adev, ring->me, ring->pipe, 0);

	if (acquire)

		set_bit(pipe, adev->gfx.pipe_reserve_bitmap);

	else
@@ -4597,7 +4597,7 @@ static void gfx_v9_0_pipe_reserve_resources(struct amdgpu_device *adev, 
		/* Lower all pipes without a current reservation */

		for (i = 0; i < adev->gfx.num_gfx_rings; ++i) {

			iring = &adev->gfx.gfx_ring[i];

			pipe = amdgpu_gfx_queue_to_bit(adev,

			pipe = amdgpu_gfx_mec_queue_to_bit(adev,

							   iring->me,

							   iring->pipe,

							   0);
@@ -4607,7 +4607,7 @@ static void gfx_v9_0_pipe_reserve_resources(struct amdgpu_device *adev, 


		for (i = 0; i < adev->gfx.num_compute_rings; ++i) {

			iring = &adev->gfx.compute_ring[i];

			pipe = amdgpu_gfx_queue_to_bit(adev,

			pipe = amdgpu_gfx_mec_queue_to_bit(adev,

							   iring->me,

							   iring->pipe,

							   0);