Commit 74743675 authored by Ryan Wanner's avatar Ryan Wanner Committed by Nicolas Ferre
Browse files

ARM: at91: pm: Remove 2.5V regulator 



Remove 2.5V regulator since enabling and disabling this regulator is no
longer supported.

Signed-off-by: default avatarRyan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/a6785a40648b315a07152bca261a42bbf0f356af.1757519351.git.Ryan.Wanner@microchip.com


Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
parent 3cae7d18

arch/arm/mach-at91/pm_suspend.S

+0 −29
Original line number Diff line number Diff line
@@ -87,29 +87,6 @@ tmp3 .req r6 


	.endm



/**

 * Set state for 2.5V low power regulator

 * @ena: 0 - disable regulator

 *	 1 - enable regulator

 *

 * Side effects: overwrites r7, r8, r9, r10

 */

	.macro at91_2_5V_reg_set_low_power ena

#ifdef CONFIG_SOC_SAMA7

	ldr	r7, .sfrbu

	mov	r8, #\ena

	ldr	r9, [r7, #AT91_SFRBU_25LDOCR]

	orr	r9, r9, #AT91_SFRBU_25LDOCR_LP

	cmp	r8, #1

	beq	lp_done_\ena

	bic	r9, r9, #AT91_SFRBU_25LDOCR_LP

lp_done_\ena:

	ldr	r10, =AT91_SFRBU_25LDOCR_LDOANAKEY

	orr	r9, r9, r10

	str	r9, [r7, #AT91_SFRBU_25LDOCR]

#endif

	.endm



	.macro at91_backup_set_lpm reg

#ifdef CONFIG_SOC_SAMA7

	orr	\reg, \reg, #0x200000
@@ -1023,9 +1000,6 @@ save_mck: 


	at91_plla_disable



	/* Enable low power mode for 2.5V regulator. */

	at91_2_5V_reg_set_low_power 1



	ldr	tmp3, .pm_mode

	cmp	tmp3, #AT91_PM_ULP1

	beq	ulp1_mode
@@ -1038,9 +1012,6 @@ ulp1_mode: 
	b	ulp_exit



ulp_exit:

	/* Disable low power mode for 2.5V regulator. */

	at91_2_5V_reg_set_low_power 0



	ldr	pmc, .pmc_base



	at91_plla_enable

include/soc/at91/sama7-sfrbu.h

+0 −7
Original line number Diff line number Diff line
@@ -18,13 +18,6 @@ 
#define		AT91_SFRBU_PSWBU_SOFTSWITCH	(1 << 1)	/* Power switch BU source selection */

#define		AT91_SFRBU_PSWBU_CTRL		(1 << 0)	/* Power switch BU control */



#define AT91_SFRBU_25LDOCR			(0x0C)		/* SFRBU 2.5V LDO Control Register */

#define		AT91_SFRBU_25LDOCR_LDOANAKEY	(0x3B6E18 << 8)	/* Specific value mandatory to allow writing of other register bits. */

#define		AT91_SFRBU_25LDOCR_STATE	(1 << 3)	/* LDOANA Switch On/Off Control */

#define		AT91_SFRBU_25LDOCR_LP		(1 << 2)	/* LDOANA Low-Power Mode Control */

#define		AT91_SFRBU_PD_VALUE_MSK		(0x3)

#define		AT91_SFRBU_25LDOCR_PD_VALUE(v)	((v) & AT91_SFRBU_PD_VALUE_MSK)	/* LDOANA Pull-down value */



#define AT91_FRBU_DDRPWR			(0x10)		/* SFRBU DDR Power Control Register */

#define		AT91_FRBU_DDRPWR_STATE		(1 << 0)	/* DDR Power Mode State */