Commit 749b61c2 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge tag 'timers-v6.18-rc1' of... 

Merge tag 'timers-v6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/daniel.lezcano/linux into timers/clocksource

Pull clocksource/events driver updates from Daniel Lezcano:

   - Add the module owner to all the drivers which can be converted into
     modules in order to have the core time framework to take the
     refcount and prevent wild module removal. In addition export the
     symbols for the sched_clock_register() function to allow the drivers
     to be converted into modules (Daniel Lezcano)

   - Convert the faraday,fttmr010 DT bindings to yaml schema (Rob
     Herring)

   - Add the DT bindings compatible string for the MT6572 (Max
     Shevchenko)

   - Fix the fsl,ftm-timer bindings by using the items to describe a
     register (Frank Li)

   - Add the DT binding documentation for Andes machine timer (Ben
     Zong-You Xie)

   - Avoid 64-bit divide operation which fails on xtensa and simplify the
     timeleft computation with 32 bits operations on Tegra186 (Guenter
     Roeck)

   - Add the fsl,timrot.yaml DT bindings for i.MX23/i.MX28 timer (Frank
     Li)

   - Replace comma by semicolon which were introduced when moving the
     static structure initialization (Chen Ni)

   - Add a new compatible for the MediaTek MT8196 SoC, fully compatible
     with MT6765 (AngeloGioacchino Del Regno)

   - Add the support for the s32g2 and s32g3 platforms in the PIT timer
     after cleaning up the code to support multiple instances (Daniel
     Lezcano)

   - Generate platform devices for MMIO timers with ACPI and integrate it
     with the arch ARM timer (Marc Zyngier)

   - Fix RTL OTTO timer by working around dying timers (Markus Stockhausen)

   - Remove extra error message in the tegra186 timer (Wolfram Sang)

   - Convert from round_rate() to determine_rate() in the Ingenic sysost
     driver (Brian Masney)

   - Add PWM capture functionality in the OMAP DM driver (Gokul Praveen)

   - Autodetect the clock rate to initialize a prescaler value compatible
     with the frequency changes on the ARM global timer (Markus
     Schneider-Pargmann)

   - Fix rollbacks missing resource deallocation in case of error on the
     clps711x (Zhen Ni)

   - Reorganize the code to split the start and the stop routine on the
     sh_cmt driver (Niklas Söderlund)

   - Add the compatible definition for ARTPEC-9 on exynos MCT (SungMin Park)
parents 8f5ae30d 45d78cd0

Documentation/devicetree/bindings/timer/faraday,fttmr010.txt

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Faraday Technology timer



This timer is a generic IP block from Faraday Technology, embedded in the

Cortina Systems Gemini SoCs and other designs.



Required properties:



- compatible : Must be one of

  "faraday,fttmr010"

  "cortina,gemini-timer", "faraday,fttmr010"

  "moxa,moxart-timer", "faraday,fttmr010"

  "aspeed,ast2400-timer"

  "aspeed,ast2500-timer"

  "aspeed,ast2600-timer"



- reg : Should contain registers location and length

- interrupts : Should contain the three timer interrupts usually with

  flags for falling edge



Optionally required properties:



- clocks : a clock to provide the tick rate for "faraday,fttmr010"

- clock-names : should be "EXTCLK" and "PCLK" for the external tick timer

  and peripheral clock respectively, for "faraday,fttmr010"

- syscon : a phandle to the global Gemini system controller if the compatible

  type is "cortina,gemini-timer"



Example:



timer@43000000 {

	compatible = "faraday,fttmr010";

	reg = <0x43000000 0x1000>;

	interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */

		   <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */

		   <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */

	clocks = <&extclk>, <&pclk>;

	clock-names = "EXTCLK", "PCLK";

};

Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/timer/faraday,fttmr010.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Faraday FTTMR010 timer



maintainers:

  - Joel Stanley <joel@jms.id.au>

  - Linus Walleij <linus.walleij@linaro.org>



description:

  This timer is a generic IP block from Faraday Technology, embedded in the

  Cortina Systems Gemini SoCs and other designs.



properties:

  compatible:

    oneOf:

      - items:

          - const: moxa,moxart-timer

          - const: faraday,fttmr010

      - enum:

          - aspeed,ast2400-timer

          - aspeed,ast2500-timer

          - aspeed,ast2600-timer

          - cortina,gemini-timer

          - faraday,fttmr010



  reg:

    maxItems: 1



  interrupts:

    minItems: 1

    maxItems: 8

    description: One interrupt per timer



  clocks:

    minItems: 1

    items:

      - description: Peripheral clock

      - description: External tick clock



  clock-names:

    minItems: 1

    items:

      - const: PCLK

      - const: EXTCLK



  resets:

    maxItems: 1



  syscon:

    description: System controller phandle for Gemini systems

    $ref: /schemas/types.yaml#/definitions/phandle



required:

  - compatible

  - reg

  - interrupts



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: cortina,gemini-timer

    then:

      required:

        - syscon

    else:

      properties:

        syscon: false



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>



    timer@43000000 {

        compatible = "faraday,fttmr010";

        reg = <0x43000000 0x1000>;

        interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */

                    <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */

                    <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */

        clocks = <&pclk>, <&extclk>;

        clock-names = "PCLK", "EXTCLK";

    };

Documentation/devicetree/bindings/timer/fsl,ftm-timer.yaml

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Original line number Diff line number Diff line
@@ -14,7 +14,9 @@ properties: 
    const: fsl,ftm-timer



  reg:

    maxItems: 1

    items:

      - description: clock event device

      - description: clock source device



  interrupts:

    maxItems: 1
@@ -50,7 +52,8 @@ examples: 


    ftm@400b8000 {

        compatible = "fsl,ftm-timer";

        reg = <0x400b8000 0x1000>;

        reg = <0x400b8000 0x1000>,

              <0x400b9000 0x1000>;

        interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;

        clock-names = "ftm-evt", "ftm-src", "ftm-evt-counter-en", "ftm-src-counter-en";

        clocks = <&clks VF610_CLK_FTM2>, <&clks VF610_CLK_FTM3>,

Documentation/devicetree/bindings/timer/fsl,timrot.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/timer/fsl,timrot.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale MXS Timer



maintainers:

  - Frank Li <Frank.Li@nxp.com>



properties:

  compatible:

    items:

      - enum:

          - fsl,imx23-timrot

          - fsl,imx28-timrot

      - const: fsl,timrot



  reg:

    maxItems: 1



  interrupts:

    items:

      - description: irq for timer0

      - description: irq for timer1

      - description: irq for timer2

      - description: irq for timer3



  clocks:

    maxItems: 1



required:

  - compatible

  - reg

  - interrupts

  - clocks



additionalProperties: false



examples:

  - |

    timer: timer@80068000 {

        compatible = "fsl,imx28-timrot", "fsl,timrot";

        reg = <0x80068000 0x2000>;

        interrupts = <48>, <49>, <50>, <51>;

        clocks = <&clks 26>;

    };

Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml

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@@ -15,8 +15,13 @@ description: 


properties:

  compatible:

    enum:

    oneOf:

      - enum:

          - fsl,vf610-pit

          - nxp,s32g2-pit

      - items:

          - const: nxp,s32g3-pit

          - const: nxp,s32g2-pit



  reg:

    maxItems: 1