Commit 74c4efe6 authored by Jun Nie's avatar Jun Nie Committed by Dmitry Baryshkov
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drm/msm/dpu: fix mixer number counter on allocation



Current code only supports usage cases with one pair of mixers at
most. To support quad-pipe usage case, two pairs of mixers need to
be reserved. The lm_count for all pairs is cleared if a peer
allocation fails in current implementation. Reset the current lm_count
to an even number instead of completely clearing it. This prevents all
pairs from being cleared in cases where multiple LM pairs are needed.

Signed-off-by: default avatarJun Nie <jun.nie@linaro.org>
Reviewed-by: default avatarJessica Zhang <quic_jesszhan@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/675400/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-1-ff6232e3472f@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
parent 762dd3eb
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+5 −1
Original line number Diff line number Diff line
@@ -374,7 +374,11 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
		if (!rm->mixer_blks[i])
			continue;

		lm_count = 0;
		/*
		 * Reset lm_count to an even index. This will drop the previous
		 * primary mixer if failed to find its peer.
		 */
		lm_count &= ~1;
		lm_idx[lm_count] = i;

		if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state,