Commit 74cc5f02 authored by Aric Cyr's avatar Aric Cyr Committed by Alex Deucher
Browse files

drm/amd/display: Remove integer scaling code from DC and fix cursor 



[Why]
Scaling better handled by upper layers before pipe splitting.

[How]
Remove DC code for integer scaling and force cursor update if
viewport or scaling changes occur to prevent underflow from
invalid cursor position.

Signed-off-by: default avatarAric Cyr <aric.cyr@amd.com>
Reviewed-by: default avatarAric Cyr <Aric.Cyr@amd.com>
Acked-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ccce745c

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+0 −44
Original line number Diff line number Diff line
@@ -940,48 +940,6 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx) 


}



static bool is_downscaled(const struct rect *src_rect, const struct rect *dst_rect)

{

        if (src_rect->width > dst_rect->width || src_rect->height > dst_rect->height)

		return true;

	return false;

}



static bool is_mpo(int layer_index)

{

	if (layer_index > 0)

		return true;

	return false;

}



static void calculate_integer_scaling(struct pipe_ctx *pipe_ctx)

{

	unsigned int integer_multiple = 1;



	if (pipe_ctx->plane_state->scaling_quality.integer_scaling &&

	    !is_downscaled(&pipe_ctx->plane_state->src_rect, &pipe_ctx->plane_state->dst_rect) &&

	    !is_mpo(pipe_ctx->plane_state->layer_index)) {

		// calculate maximum # of replication of src onto addressable

		integer_multiple = min(

				pipe_ctx->stream->timing.h_addressable / pipe_ctx->stream->src.width,

				pipe_ctx->stream->timing.v_addressable  / pipe_ctx->stream->src.height);



		//scale dst

		pipe_ctx->stream->dst.width  = integer_multiple * pipe_ctx->stream->src.width;

		pipe_ctx->stream->dst.height = integer_multiple * pipe_ctx->stream->src.height;



		//center dst onto addressable

		pipe_ctx->stream->dst.x = (pipe_ctx->stream->timing.h_addressable - pipe_ctx->stream->dst.width)/2;

		pipe_ctx->stream->dst.y = (pipe_ctx->stream->timing.v_addressable - pipe_ctx->stream->dst.height)/2;



		//We are guaranteed that we are scaling in integer ratio

		pipe_ctx->plane_state->scaling_quality.v_taps = 1;

		pipe_ctx->plane_state->scaling_quality.h_taps = 1;

		pipe_ctx->plane_state->scaling_quality.v_taps_c = 1;

		pipe_ctx->plane_state->scaling_quality.h_taps_c = 1;

	}

}



bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)

{

	const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
@@ -995,8 +953,6 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) 
	pipe_ctx->plane_res.scl_data.format = convert_pixel_format_to_dalsurface(

			pipe_ctx->plane_state->format);



	calculate_integer_scaling(pipe_ctx);



	calculate_scaling_ratios(pipe_ctx);



	calculate_viewport(pipe_ctx);

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

+2 −1
Original line number Diff line number Diff line
@@ -1394,7 +1394,8 @@ static void dcn20_update_dchubp_dpp( 
	}



	/* Any updates are handled in dc interface, just need to apply existing for plane enable */

	if ((pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.opp_changed)

	if ((pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.opp_changed ||

			pipe_ctx->update_flags.bits.scaler || pipe_ctx->update_flags.bits.viewport)

			&& pipe_ctx->stream->cursor_attributes.address.quad_part != 0) {

		dc->hwss.set_cursor_position(pipe_ctx);

		dc->hwss.set_cursor_attribute(pipe_ctx);