Commit 75390b69 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
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arm64: dts: qcom: sm8450: switch UFS QMP PHY to new style of bindings 



Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231205032552.1583336-10-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 002a13ed

arch/arm64/boot/dts/qcom/sm8450.dtsi

+10 −18
Original line number Diff line number Diff line
@@ -756,9 +756,9 @@ gcc: clock-controller@100000 { 
				 <&pcie0_phy>,

				 <&pcie1_phy>,

				 <0>,

				 <&ufs_mem_phy_lanes 0>,

				 <&ufs_mem_phy_lanes 1>,

				 <&ufs_mem_phy_lanes 2>,

				 <&ufs_mem_phy 0>,

				 <&ufs_mem_phy 1>,

				 <&ufs_mem_phy 2>,

				 <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;

			clock-names = "bi_tcxo",

				      "sleep_clk",
@@ -4329,7 +4329,7 @@ ufs_mem_hc: ufshc@1d84000 { 
				     "jedec,ufs-2.0";

			reg = <0 0x01d84000 0 0x3000>;

			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;

			phys = <&ufs_mem_phy_lanes>;

			phys = <&ufs_mem_phy>;

			phy-names = "ufsphy";

			lanes-per-direction = <2>;

			#reset-cells = <1>;
@@ -4378,10 +4378,8 @@ ufs_mem_hc: ufshc@1d84000 { 


		ufs_mem_phy: phy@1d87000 {

			compatible = "qcom,sm8450-qmp-ufs-phy";

			reg = <0 0x01d87000 0 0x1c4>;

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			reg = <0 0x01d87000 0 0x1000>;



			clock-names = "ref", "ref_aux", "qref";

			clocks = <&rpmhcc RPMH_CXO_CLK>,

				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
@@ -4389,17 +4387,11 @@ ufs_mem_phy: phy@1d87000 { 


			resets = <&ufs_mem_hc 0>;

			reset-names = "ufsphy";

			status = "disabled";



			ufs_mem_phy_lanes: phy@1d87400 {

				reg = <0 0x01d87400 0 0x188>,

				      <0 0x01d87600 0 0x200>,

				      <0 0x01d87c00 0 0x200>,

				      <0 0x01d87800 0 0x188>,

				      <0 0x01d87a00 0 0x200>;

			#clock-cells = <1>;

			#phy-cells = <0>;

			};



			status = "disabled";

		};



		ice: crypto@1d88000 {