Commit 756c85e4 authored by Nicholas Susanto's avatar Nicholas Susanto Committed by Alex Deucher
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drm/amd/display: Enable urgent latency adjustment on DCN35 



[Why]

Urgent latency adjustment was disabled on DCN35 due to issues with P0
enablement on some platforms. Without urgent latency, underflows occur
when doing certain high timing configurations. After testing, we found
that reenabling urgent latency didn't reintroduce p0 support on multiple
platforms.

[How]

renable urgent latency on DCN35 and setting it to 3000 Mhz.

This reverts commit 3412860c.

Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Signed-off-by: default avatarNicholas Susanto <nsusanto@amd.com>
Signed-off-by: default avatarZaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: default avatarMark Broadworth <mark.broadworth@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
(cherry picked from commit cd74ce1f)
parent 67fe5746

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

+2 −2
Original line number Diff line number Diff line
@@ -195,9 +195,9 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = { 
	.dcn_downspread_percent = 0.5,

	.gpuvm_min_page_size_bytes = 4096,

	.hostvm_min_page_size_bytes = 4096,

	.do_urgent_latency_adjustment = 0,

	.do_urgent_latency_adjustment = 1,

	.urgent_latency_adjustment_fabric_clock_component_us = 0,

	.urgent_latency_adjustment_fabric_clock_reference_mhz = 0,

	.urgent_latency_adjustment_fabric_clock_reference_mhz = 3000,

};



void dcn35_build_wm_range_table_fpu(struct clk_mgr *clk_mgr)