Commit 758e4c86 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2025-04-05' of https://gitlab.freedesktop.org/drm/kernel

Pull drm fixes from Dave Airlie:
 "Weekly fixes, mostly from the end of last week, this week was very
  quiet, maybe you scared everyone away. It's mostly amdgpu, and xe,
  with some i915, adp and bridge bits, since I think this is overly
  quiet I'd expect rc2 to be a bit more lively.

  bridge:
   - tda998x: Select CONFIG_DRM_KMS_HELPER

  amdgpu:
   - Guard against potential division by 0 in fan code
   - Zero RPM support for SMU 14.0.2
   - Properly handle SI and CIK support being disabled
   - PSR fixes
   - DML2 fixes
   - DP Link training fix
   - Vblank fixes
   - RAS fixes
   - Partitioning fix
   - SDMA fix
   - SMU 13.0.x fixes
   - Rom fetching fix
   - MES fixes
   - Queue reset fix

  xe:
   - Fix NULL pointer dereference on error path
   - Add missing HW workaround for BMG
   - Fix survivability mode not triggering
   - Fix build warning when DRM_FBDEV_EMULATION is not set

  i915:
   - Bounds check for scalers in DSC prefill latency computation
   - Fix build by adding a missing include

  adp:
   - Fix error handling in plane setup"

  # -----BEGIN PGP SIGNATURE-----

* tag 'drm-next-2025-04-05' of https://gitlab.freedesktop.org/drm/kernel: (34 commits)
  drm/i2c: tda998x: select CONFIG_DRM_KMS_HELPER
  drm/amdgpu/gfx12: fix num_mec
  drm/amdgpu/gfx11: fix num_mec
  drm/amd/pm: Add gpu_metrics_v1_8
  drm/amdgpu: Prefer shadow rom when available
  drm/amd/pm: Update smu metrics table for smu_v13_0_6
  drm/amd/pm: Remove host limit metrics support
  Remove unnecessary firmware version check for gc v9_4_2
  drm/amdgpu: stop unmapping MQD for kernel queues v3
  Revert "drm/amdgpu/sdma_v4_4_2: update VM flush implementation for SDMA"
  drm/amdgpu: Parse all deferred errors with UMC aca handle
  drm/amdgpu: Update ta ras block
  drm/amdgpu: Add NPS2 to DPX compatible mode
  drm/amdgpu: Use correct gfx deferred error count
  drm/amd/display: Actually do immediate vblank disable
  drm/amd/display: prevent hang on link training fail
  Revert "drm/amd/display: dml2 soc dscclk use DPM table clk setting"
  drm/amd/display: Increase vblank offdelay for PSR panels
  drm/amd: Handle being compiled without SI or CIK support better
  drm/amd/pm: Add zero RPM enabled OD setting support for SMU14.0.2
  ...
parents 56f94452 e2cb28ea
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+2 −2
Original line number Diff line number Diff line
@@ -232,9 +232,9 @@ static struct drm_plane *adp_plane_new(struct adp_drv_private *adp)
					     ALL_CRTCS, &adp_plane_funcs,
					     plane_formats, ARRAY_SIZE(plane_formats),
					     NULL, DRM_PLANE_TYPE_PRIMARY, "plane");
	if (!plane) {
	if (IS_ERR(plane)) {
		drm_err(drm, "failed to allocate plane");
		return ERR_PTR(-ENOMEM);
		return plane;
	}

	drm_plane_helper_add(plane, &adp_plane_helper_funcs);
+4 −0
Original line number Diff line number Diff line
@@ -195,6 +195,10 @@ static bool aca_bank_is_valid(struct aca_handle *handle, struct aca_bank *bank,
{
	const struct aca_bank_ops *bank_ops = handle->bank_ops;

	/* Parse all deferred errors with UMC aca handle */
	if (ACA_BANK_ERR_IS_DEFFERED(bank))
		return handle->hwip == ACA_HWIP_TYPE_UMC;

	if (!aca_bank_hwip_is_matched(bank, handle->hwip))
		return false;

+0 −8
Original line number Diff line number Diff line
@@ -80,14 +80,6 @@ struct ras_query_context;
	(ACA_REG__STATUS__POISON((bank)->regs[ACA_REG_IDX_STATUS]) || \
	 ACA_REG__STATUS__DEFERRED((bank)->regs[ACA_REG_IDX_STATUS]))

#define ACA_BANK_ERR_CE_DE_DECODE(bank)                             \
	(ACA_BANK_ERR_IS_DEFFERED(bank) ? ACA_ERROR_TYPE_DEFERRED : \
					  ACA_ERROR_TYPE_CE)

#define ACA_BANK_ERR_UE_DE_DECODE(bank)                             \
	(ACA_BANK_ERR_IS_DEFFERED(bank) ? ACA_ERROR_TYPE_DEFERRED : \
					  ACA_ERROR_TYPE_UE)

enum aca_reg_idx {
	ACA_REG_IDX_CTL			= 0,
	ACA_REG_IDX_STATUS		= 1,
+27 −7
Original line number Diff line number Diff line
@@ -447,6 +447,13 @@ static bool amdgpu_get_bios_apu(struct amdgpu_device *adev)
	return true;
}

static bool amdgpu_prefer_rom_resource(struct amdgpu_device *adev)
{
	struct resource *res = &adev->pdev->resource[PCI_ROM_RESOURCE];

	return (res->flags & IORESOURCE_ROM_SHADOW);
}

static bool amdgpu_get_bios_dgpu(struct amdgpu_device *adev)
{
	if (amdgpu_atrm_get_bios(adev)) {
@@ -465,6 +472,18 @@ static bool amdgpu_get_bios_dgpu(struct amdgpu_device *adev)
		goto success;
	}

	if (amdgpu_prefer_rom_resource(adev)) {
		if (amdgpu_read_bios(adev)) {
			dev_info(adev->dev, "Fetched VBIOS from ROM BAR\n");
			goto success;
		}

		if (amdgpu_read_platform_bios(adev)) {
			dev_info(adev->dev, "Fetched VBIOS from platform\n");
			goto success;
		}

	} else {
		if (amdgpu_read_platform_bios(adev)) {
			dev_info(adev->dev, "Fetched VBIOS from platform\n");
			goto success;
@@ -474,6 +493,7 @@ static bool amdgpu_get_bios_dgpu(struct amdgpu_device *adev)
			dev_info(adev->dev, "Fetched VBIOS from ROM BAR\n");
			goto success;
		}
	}

	if (amdgpu_read_bios_from_rom(adev)) {
		dev_info(adev->dev, "Fetched VBIOS from ROM\n");
+24 −20
Original line number Diff line number Diff line
@@ -1809,7 +1809,6 @@ static const u16 amdgpu_unsupported_pciidlist[] = {
};

static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_AMDGPU_SI
	{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
	{0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
	{0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
@@ -1882,8 +1881,6 @@ static const struct pci_device_id pciidlist[] = {
	{0x1002, 0x6665, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
	{0x1002, 0x6667, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
	{0x1002, 0x666F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
#endif
#ifdef CONFIG_DRM_AMDGPU_CIK
	/* Kaveri */
	{0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
	{0x1002, 0x1305, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
@@ -1966,7 +1963,6 @@ static const struct pci_device_id pciidlist[] = {
	{0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
	{0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
	{0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
#endif
	/* topaz */
	{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
	{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
@@ -2313,14 +2309,14 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
		return -ENOTSUPP;
	}

#ifdef CONFIG_DRM_AMDGPU_SI
	if (!amdgpu_si_support) {
	switch (flags & AMD_ASIC_MASK) {
	case CHIP_TAHITI:
	case CHIP_PITCAIRN:
	case CHIP_VERDE:
	case CHIP_OLAND:
	case CHIP_HAINAN:
#ifdef CONFIG_DRM_AMDGPU_SI
		if (!amdgpu_si_support) {
			dev_info(&pdev->dev,
				 "SI support provided by radeon.\n");
			dev_info(&pdev->dev,
@@ -2328,16 +2324,18 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
				);
			return -ENODEV;
		}
	}
		break;
#else
		dev_info(&pdev->dev, "amdgpu is built without SI support.\n");
		return -ENODEV;
#endif
#ifdef CONFIG_DRM_AMDGPU_CIK
	if (!amdgpu_cik_support) {
		switch (flags & AMD_ASIC_MASK) {
	case CHIP_KAVERI:
	case CHIP_BONAIRE:
	case CHIP_HAWAII:
	case CHIP_KABINI:
	case CHIP_MULLINS:
#ifdef CONFIG_DRM_AMDGPU_CIK
		if (!amdgpu_cik_support) {
			dev_info(&pdev->dev,
				 "CIK support provided by radeon.\n");
			dev_info(&pdev->dev,
@@ -2345,8 +2343,14 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
				);
			return -ENODEV;
		}
	}
		break;
#else
		dev_info(&pdev->dev, "amdgpu is built without CIK support.\n");
		return -ENODEV;
#endif
	default:
		break;
	}

	adev = devm_drm_dev_alloc(&pdev->dev, &amdgpu_kms_driver, typeof(*adev), ddev);
	if (IS_ERR(adev))
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