Commit 75c78a4f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v7.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fixes from Linus Walleij:

 - Implement .get_direction() in the spmi-gpio gpio_chip

   Recent changes makes this start to print warnings and it's not nice,
   let's just fix it

 - Clamp the return value of gpio_get() in the Renesas RZA1 driver

 - Add the GPIO_GENERIC dependency to the STM32 HDP driver

 - Modify the Mediatek driver to accept devices that do not use external
   interrupts (EINT) at all

 - Fix flag propagation in the Sunxi driver, so that we can fix an issue
   with uninitialized pins in a follow-up patch using said flags

* tag 'pinctrl-v7.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: sunxi: fix gpiochip_lock_as_irq() failure when pinmux is unknown
  pinctrl: sunxi: pass down flags to pinctrl routines
  pinctrl: mediatek: common: Fix probe failure for devices without EINT
  pinctrl: stm32: fix HDP driver dependency on GPIO_GENERIC
  pinctrl: renesas: rza1: Normalize return value of gpio_get()
  pinctrl: qcom: spmi-gpio: implement .get_direction()
  pinctrl: renesas: rzt2h: Fix invalid wait context
  pinctrl: renesas: rzt2h: Fix device node leak in rzt2h_gpio_register()
parents dabb83ec 70f8915e

drivers/pinctrl/mediatek/pinctrl-mtk-common.c

+6 −3
Original line number Diff line number Diff line
@@ -1135,9 +1135,12 @@ int mtk_pctrl_init(struct platform_device *pdev, 
		goto chip_error;

	}



	/* Only initialize EINT if we have EINT pins */

	if (data->eint_hw.ap_num > 0) {

		ret = mtk_eint_init(pctl, pdev);

		if (ret)

			goto chip_error;

	}



	return 0;

drivers/pinctrl/qcom/pinctrl-spmi-gpio.c

+16 −0
Original line number Diff line number Diff line
@@ -723,6 +723,21 @@ static const struct pinconf_ops pmic_gpio_pinconf_ops = { 
	.pin_config_group_dbg_show	= pmic_gpio_config_dbg_show,

};



static int pmic_gpio_get_direction(struct gpio_chip *chip, unsigned pin)

{

	struct pmic_gpio_state *state = gpiochip_get_data(chip);

	struct pmic_gpio_pad *pad;



	pad = state->ctrl->desc->pins[pin].drv_data;



	if (!pad->is_enabled || pad->analog_pass ||

	    (!pad->input_enabled && !pad->output_enabled))

		return -EINVAL;



	/* Make sure the state is aligned on what pmic_gpio_get() returns */

	return pad->input_enabled ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT;

}



static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned pin)

{

	struct pmic_gpio_state *state = gpiochip_get_data(chip);
@@ -801,6 +816,7 @@ static void pmic_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 
}



static const struct gpio_chip pmic_gpio_gpio_template = {

	.get_direction		= pmic_gpio_get_direction,

	.direction_input	= pmic_gpio_direction_input,

	.direction_output	= pmic_gpio_direction_output,

	.get			= pmic_gpio_get,

drivers/pinctrl/renesas/pinctrl-rza1.c

+1 −1
Original line number Diff line number Diff line
@@ -589,7 +589,7 @@ static inline unsigned int rza1_get_bit(struct rza1_port *port, 
{

	void __iomem *mem = RZA1_ADDR(port->base, reg, port->id);



	return ioread16(mem) & BIT(bit);

	return !!(ioread16(mem) & BIT(bit));

}



/**

drivers/pinctrl/renesas/pinctrl-rzt2h.c

+8 −7
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ struct rzt2h_pinctrl { 
	struct gpio_chip		gpio_chip;

	struct pinctrl_gpio_range	gpio_range;

	DECLARE_BITMAP(used_irqs, RZT2H_INTERRUPTS_NUM);

	spinlock_t			lock; /* lock read/write registers */

	raw_spinlock_t			lock; /* lock read/write registers */

	struct mutex			mutex; /* serialize adding groups and functions */

	bool				safety_port_enabled;

	atomic_t			wakeup_path;
@@ -145,7 +145,7 @@ static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl, 
	u64 reg64;

	u16 reg16;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	/* Set pin to 'Non-use (Hi-Z input protection)'  */

	reg16 = rzt2h_pinctrl_readw(pctrl, port, PM(port));
@@ -474,7 +474,7 @@ static int rzt2h_gpio_request(struct gpio_chip *chip, unsigned int offset) 
	if (ret)

		return ret;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	/* Select GPIO mode in PMC Register */

	rzt2h_pinctrl_set_gpio_en(pctrl, port, bit, true);
@@ -487,7 +487,7 @@ static void rzt2h_gpio_set_direction(struct rzt2h_pinctrl *pctrl, u32 port, 
{

	u16 reg;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	reg = rzt2h_pinctrl_readw(pctrl, port, PM(port));

	reg &= ~PM_PIN_MASK(bit);
@@ -509,7 +509,7 @@ static int rzt2h_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) 
	if (ret)

		return ret;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	if (rzt2h_pinctrl_readb(pctrl, port, PMC(port)) & BIT(bit)) {

		/*
@@ -547,7 +547,7 @@ static int rzt2h_gpio_set(struct gpio_chip *chip, unsigned int offset, 
	u8 bit = RZT2H_PIN_ID_TO_PIN(offset);

	u8 reg;



	guard(spinlock_irqsave)(&pctrl->lock);

	guard(raw_spinlock_irqsave)(&pctrl->lock);



	reg = rzt2h_pinctrl_readb(pctrl, port, P(port));

	if (value)
@@ -833,6 +833,7 @@ static int rzt2h_gpio_register(struct rzt2h_pinctrl *pctrl) 
	if (ret)

		return dev_err_probe(dev, ret, "Unable to parse gpio-ranges\n");



	of_node_put(of_args.np);

	if (of_args.args[0] != 0 || of_args.args[1] != 0 ||

	    of_args.args[2] != pctrl->data->n_port_pins)

		return dev_err_probe(dev, -EINVAL,
@@ -964,7 +965,7 @@ static int rzt2h_pinctrl_probe(struct platform_device *pdev) 
	if (ret)

		return ret;



	spin_lock_init(&pctrl->lock);

	raw_spin_lock_init(&pctrl->lock);

	mutex_init(&pctrl->mutex);

	platform_set_drvdata(pdev, pctrl);

drivers/pinctrl/stm32/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ config PINCTRL_STM32_HDP 
	select PINMUX

	select GENERIC_PINCONF

	select GPIOLIB

	select GPIO_GENERIC

	help

	  The Hardware Debug Port allows the observation of internal signals.

	  It uses configurable multiplexer to route signals in a dedicated observation register.