Commit 768270ca authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Bjorn Andersson
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arm64: dts: qcom: sm8250: add wsa and va codec macros 



Add support for WSA and VA codec macros along with WSA soundwire
controller required for getting audio on RB5.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-5-srinivas.kandagatla@linaro.org


[bjorn: Replaced LPASS_CDC clock defines with constants]
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 3160c1b8

arch/arm64/boot/dts/qcom/sm8250.dtsi

+56 −0
Original line number Diff line number Diff line
@@ -1264,6 +1264,47 @@ tcsr_mutex: hwlock@1f40000 { 
			#hwlock-cells = <1>;

		};



		wsamacro: codec@3240000 {

			compatible = "qcom,sm8250-lpass-wsa-macro";

			reg = <0 0x03240000 0 0x1000>;

			clocks = <&audiocc 1>,

				 <&audiocc 0>,

				 <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

				 <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

				 <&aoncc 0>,

				 <&vamacro>;



			clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen";



			#clock-cells = <0>;

			clock-frequency = <9600000>;

			clock-output-names = "mclk";

			#sound-dai-cells = <1>;



			pinctrl-names = "default";

			pinctrl-0 = <&wsa_swr_active>;

		};



		swr0: soundwire-controller@3250000 {

			reg = <0 0x03250000 0 0x2000>;

			compatible = "qcom,soundwire-v1.5.1";

			interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&wsamacro>;

			clock-names = "iface";



			qcom,din-ports = <2>;

			qcom,dout-ports = <6>;



			qcom,ports-sinterval-low =	/bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>;

			qcom,ports-offset1 =		/bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>;

			qcom,ports-offset2 =		/bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>;

			qcom,ports-block-pack-mode =	/bits/ 8 <0x0 0x0 0x1 0x0 0x0 0x1 0x0 0x0>;



			#sound-dai-cells = <1>;

			#address-cells = <2>;

			#size-cells = <0>;

		};



		audiocc: clock-controller@3300000 {

			compatible = "qcom,sm8250-lpass-audiocc";

			reg = <0 0x03300000 0 0x30000>;
@@ -1274,6 +1315,21 @@ audiocc: clock-controller@3300000 { 
			clock-names = "core", "audio", "bus";

		};



		vamacro: codec@3370000 {

			compatible = "qcom,sm8250-lpass-va-macro";

			reg = <0 0x03370000 0 0x1000>;

			clocks = <&aoncc 0>,

				<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,

				<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;



			clock-names = "mclk", "macro", "dcodec";



			#clock-cells = <0>;

			clock-frequency = <9600000>;

			clock-output-names = "fsgen";

			#sound-dai-cells = <1>;

		};



		aoncc: clock-controller@3380000 {

			compatible = "qcom,sm8250-lpass-aoncc";

			reg = <0 0x03380000 0 0x40000>;