Commit 76f46186 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-xe-fixes-2024-08-22' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes 



UAPI Changes:
- Fix OA format masks which were breaking build with gcc-5 (Geert)

Driver Changes:
- Fix opregion leak (Lucas)
- Fix OA sysfs entry (Ashutosh)
- Fix VM dma-resv lock (Brost)
- Fix tile fini sequence (Brost)
- Prevent UAF around preempt fence (Auld)
- Fix DGFX display suspend/resume (Maarten)
- Many Xe/Xe2 critical workarounds (Auld, Ngai-Mint, Bommu, Tejas, Daniele)
- Fix devm/drmm issues (Daniele)
- Fix missing workqueue destroy in xe_gt_pagefault (Stuart)
- Drop HW fence pointer to HW fence ctx (Brost)
- Free job before xe_exec_queue_put (Brost)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZsdVe0XI2Pq8C-ON@intel.com
parents 5159b9dc 9e7f3056

drivers/gpu/drm/xe/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -25,12 +25,14 @@ $(obj)/generated/%_wa_oob.c $(obj)/generated/%_wa_oob.h: $(obj)/xe_gen_wa_oob \ 


uses_generated_oob := \

	$(obj)/xe_ggtt.o \

	$(obj)/xe_device.o \

	$(obj)/xe_gsc.o \

	$(obj)/xe_gt.o \

	$(obj)/xe_guc.o \

	$(obj)/xe_guc_ads.o \

	$(obj)/xe_guc_pc.o \

	$(obj)/xe_migrate.o \

	$(obj)/xe_pat.o \

	$(obj)/xe_ring_ops.o \

	$(obj)/xe_vm.o \

	$(obj)/xe_wa.o \

drivers/gpu/drm/xe/display/xe_display.c

+27 −1
Original line number Diff line number Diff line
@@ -132,6 +132,7 @@ static void xe_display_fini_noirq(void *arg) 
		return;



	intel_display_driver_remove_noirq(xe);

	intel_opregion_cleanup(xe);

}



int xe_display_init_noirq(struct xe_device *xe)
@@ -157,8 +158,10 @@ int xe_display_init_noirq(struct xe_device *xe) 
	intel_display_device_info_runtime_init(xe);



	err = intel_display_driver_probe_noirq(xe);

	if (err)

	if (err) {

		intel_opregion_cleanup(xe);

		return err;

	}



	return devm_add_action_or_reset(xe->drm.dev, xe_display_fini_noirq, xe);

}
@@ -280,6 +283,27 @@ static bool suspend_to_idle(void) 
	return false;

}



static void xe_display_flush_cleanup_work(struct xe_device *xe)

{

	struct intel_crtc *crtc;



	for_each_intel_crtc(&xe->drm, crtc) {

		struct drm_crtc_commit *commit;



		spin_lock(&crtc->base.commit_lock);

		commit = list_first_entry_or_null(&crtc->base.commit_list,

						  struct drm_crtc_commit, commit_entry);

		if (commit)

			drm_crtc_commit_get(commit);

		spin_unlock(&crtc->base.commit_lock);



		if (commit) {

			wait_for_completion(&commit->cleanup_done);

			drm_crtc_commit_put(commit);

		}

	}

}



void xe_display_pm_suspend(struct xe_device *xe, bool runtime)

{

	bool s2idle = suspend_to_idle();
@@ -297,6 +321,8 @@ void xe_display_pm_suspend(struct xe_device *xe, bool runtime) 
	if (!runtime)

		intel_display_driver_suspend(xe);



	xe_display_flush_cleanup_work(xe);



	intel_dp_mst_suspend(xe);



	intel_hpd_cancel_work(xe);

drivers/gpu/drm/xe/display/xe_dsb_buffer.c

+8 −0
Original line number Diff line number Diff line
@@ -7,6 +7,8 @@ 
#include "intel_display_types.h"

#include "intel_dsb_buffer.h"

#include "xe_bo.h"

#include "xe_device.h"

#include "xe_device_types.h"

#include "xe_gt.h"



u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf)
@@ -16,7 +18,10 @@ u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf) 


void intel_dsb_buffer_write(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val)

{

	struct xe_device *xe = dsb_buf->vma->bo->tile->xe;



	iosys_map_wr(&dsb_buf->vma->bo->vmap, idx * 4, u32, val);

	xe_device_l2_flush(xe);

}



u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx)
@@ -26,9 +31,12 @@ u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx) 


void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val, size_t size)

{

	struct xe_device *xe = dsb_buf->vma->bo->tile->xe;



	WARN_ON(idx > (dsb_buf->buf_size - size) / sizeof(*dsb_buf->cmd_buf));



	iosys_map_memset(&dsb_buf->vma->bo->vmap, idx * 4, val, size);

	xe_device_l2_flush(xe);

}



bool intel_dsb_buffer_create(struct intel_crtc *crtc, struct intel_dsb_buffer *dsb_buf, size_t size)

drivers/gpu/drm/xe/display/xe_fb_pin.c

+3 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include "intel_fb.h"

#include "intel_fb_pin.h"

#include "xe_bo.h"

#include "xe_device.h"

#include "xe_ggtt.h"

#include "xe_gt.h"

#include "xe_pm.h"
@@ -304,6 +305,8 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, 
	if (ret)

		goto err_unpin;



	/* Ensure DPT writes are flushed */

	xe_device_l2_flush(xe);

	return vma;



err_unpin:

drivers/gpu/drm/xe/regs/xe_gt_regs.h

+9 −0
Original line number Diff line number Diff line
@@ -80,6 +80,9 @@ 
#define   LE_CACHEABILITY_MASK			REG_GENMASK(1, 0)

#define   LE_CACHEABILITY(value)		REG_FIELD_PREP(LE_CACHEABILITY_MASK, value)



#define XE2_GAMREQSTRM_CTRL			XE_REG(0x4194)

#define   CG_DIS_CNTLBUS			REG_BIT(6)



#define CCS_AUX_INV				XE_REG(0x4208)



#define VD0_AUX_INV				XE_REG(0x4218)
@@ -372,6 +375,11 @@ 


#define XEHPC_L3CLOS_MASK(i)			XE_REG_MCR(0xb194 + (i) * 8)



#define XE2_GLOBAL_INVAL			XE_REG(0xb404)



#define SCRATCH1LPFC				XE_REG(0xb474)

#define   EN_L3_RW_CCS_CACHE_FLUSH		REG_BIT(0)



#define XE2LPM_L3SQCREG5			XE_REG_MCR(0xb658)



#define XE2_TDF_CTRL				XE_REG(0xb418)
@@ -429,6 +437,7 @@ 
#define   DIS_FIX_EOT1_FLUSH			REG_BIT(9)



#define TDL_TSL_CHICKEN				XE_REG_MCR(0xe4c4, XE_REG_OPTION_MASKED)

#define   STK_ID_RESTRICT			REG_BIT(12)

#define   SLM_WMTP_RESTORE			REG_BIT(11)



#define ROW_CHICKEN				XE_REG_MCR(0xe4f0, XE_REG_OPTION_MASKED)