Commit 77543269 authored by Jiaxun Yang's avatar Jiaxun Yang Committed by Thomas Bogendoerfer
Browse files

MIPS: Loongson64: env: Hook up Loongsson-2K 



Somehow those enablement bits were left over when we were
adding initial Loongson-2K support.

Set up basic information and select proper builtin DTB for
Loongson-2K.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent 335819fd

arch/mips/include/asm/mach-loongson64/boot_param.h

+2 −0
Original line number Diff line number Diff line
@@ -42,12 +42,14 @@ enum loongson_cpu_type { 
	Legacy_1B = 0x5,

	Legacy_2G = 0x6,

	Legacy_2H = 0x7,

	Legacy_2K = 0x8,

	Loongson_1A = 0x100,

	Loongson_1B = 0x101,

	Loongson_2E = 0x200,

	Loongson_2F = 0x201,

	Loongson_2G = 0x202,

	Loongson_2H = 0x203,

	Loongson_2K = 0x204,

	Loongson_3A = 0x300,

	Loongson_3B = 0x301

};

arch/mips/loongson64/env.c

+8 −0
Original line number Diff line number Diff line
@@ -88,6 +88,12 @@ void __init prom_lefi_init_env(void) 
	cpu_clock_freq = ecpu->cpu_clock_freq;

	loongson_sysconf.cputype = ecpu->cputype;

	switch (ecpu->cputype) {

	case Legacy_2K:

	case Loongson_2K:

		smp_group[0] = 0x900000001fe11000;

		loongson_sysconf.cores_per_node = 2;

		loongson_sysconf.cores_per_package = 2;

		break;

	case Legacy_3A:

	case Loongson_3A:

		loongson_sysconf.cores_per_node = 4;
@@ -221,6 +227,8 @@ void __init prom_lefi_init_env(void) 
		default:

			break;

		}

	} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) {

		loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin;

	} else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {

		if (loongson_sysconf.bridgetype == LS7A)

			loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;