Commit 777cf27f authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-5.14-soc' of... 

Merge tag 'tegra-for-5.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc

soc/tegra: Changes for v5.14-rc1

These changes implement the core power domain for the PMC, and fix a
couple of minor issues as well as add stubs to help some drivers be
compile tested more easily.

* tag 'tegra-for-5.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Fix Tegra234-only builds
  soc/tegra: fuse: Don't return -ENOMEM when allocate lookups failed
  soc/tegra: regulators: Support core domain state syncing
  soc/tegra: pmc: Add driver state syncing
  soc/tegra: pmc: Add core power domain
  soc/tegra: fuse: Add stubs needed for compile-testing
  soc/tegra: Add devm_tegra_core_dev_init_opp_table()
  soc/tegra: Add stub for soc_is_tegra()
  soc/tegra: regulators: Bump voltages on system reboot
  regulator: core: Add regulator_sync_voltage_rdev()

Link: https://lore.kernel.org/r/20210611164437.3568059-2-thierry.reding@gmail.com


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 805be5c9 e2d0ee22

drivers/regulator/core.c

+23 −0
Original line number Diff line number Diff line
@@ -4105,6 +4105,29 @@ int regulator_set_voltage_time_sel(struct regulator_dev *rdev, 
}

EXPORT_SYMBOL_GPL(regulator_set_voltage_time_sel);



int regulator_sync_voltage_rdev(struct regulator_dev *rdev)

{

	int ret;



	regulator_lock(rdev);



	if (!rdev->desc->ops->set_voltage &&

	    !rdev->desc->ops->set_voltage_sel) {

		ret = -EINVAL;

		goto out;

	}



	/* balance only, if regulator is coupled */

	if (rdev->coupling_desc.n_coupled > 1)

		ret = regulator_balance_voltage(rdev, PM_SUSPEND_ON);

	else

		ret = -EOPNOTSUPP;



out:

	regulator_unlock(rdev);

	return ret;

}



/**

 * regulator_sync_voltage - re-apply last regulator output voltage

 * @regulator: regulator source

drivers/soc/tegra/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -144,6 +144,8 @@ config SOC_TEGRA_FLOWCTRL 
config SOC_TEGRA_PMC

	bool

	select GENERIC_PINCONF

	select PM_OPP

	select PM_GENERIC_DOMAINS



config SOC_TEGRA_POWERGATE_BPMP

	def_bool y

drivers/soc/tegra/common.c

+97 −0
Original line number Diff line number Diff line
@@ -3,9 +3,16 @@ 
 * Copyright (C) 2014 NVIDIA CORPORATION.  All rights reserved.

 */



#define dev_fmt(fmt)	"tegra-soc: " fmt



#include <linux/clk.h>

#include <linux/device.h>

#include <linux/export.h>

#include <linux/of.h>

#include <linux/pm_opp.h>



#include <soc/tegra/common.h>

#include <soc/tegra/fuse.h>



static const struct of_device_id tegra_machine_match[] = {

	{ .compatible = "nvidia,tegra20", },
@@ -31,3 +38,93 @@ bool soc_is_tegra(void) 


	return match != NULL;

}



static int tegra_core_dev_init_opp_state(struct device *dev)

{

	unsigned long rate;

	struct clk *clk;

	int err;



	clk = devm_clk_get(dev, NULL);

	if (IS_ERR(clk)) {

		dev_err(dev, "failed to get clk: %pe\n", clk);

		return PTR_ERR(clk);

	}



	rate = clk_get_rate(clk);

	if (!rate) {

		dev_err(dev, "failed to get clk rate\n");

		return -EINVAL;

	}



	/* first dummy rate-setting initializes voltage vote */

	err = dev_pm_opp_set_rate(dev, rate);

	if (err) {

		dev_err(dev, "failed to initialize OPP clock: %d\n", err);

		return err;

	}



	return 0;

}



/**

 * devm_tegra_core_dev_init_opp_table() - initialize OPP table

 * @dev: device for which OPP table is initialized

 * @params: pointer to the OPP table configuration

 *

 * This function will initialize OPP table and sync OPP state of a Tegra SoC

 * core device.

 *

 * Return: 0 on success or errorno.

 */

int devm_tegra_core_dev_init_opp_table(struct device *dev,

				       struct tegra_core_opp_params *params)

{

	u32 hw_version;

	int err;



	err = devm_pm_opp_set_clkname(dev, NULL);

	if (err) {

		dev_err(dev, "failed to set OPP clk: %d\n", err);

		return err;

	}



	/* Tegra114+ doesn't support OPP yet */

	if (!of_machine_is_compatible("nvidia,tegra20") &&

	    !of_machine_is_compatible("nvidia,tegra30"))

		return -ENODEV;



	if (of_machine_is_compatible("nvidia,tegra20"))

		hw_version = BIT(tegra_sku_info.soc_process_id);

	else

		hw_version = BIT(tegra_sku_info.soc_speedo_id);



	err = devm_pm_opp_set_supported_hw(dev, &hw_version, 1);

	if (err) {

		dev_err(dev, "failed to set OPP supported HW: %d\n", err);

		return err;

	}



	/*

	 * Older device-trees have an empty OPP table, we will get

	 * -ENODEV from devm_pm_opp_of_add_table() in this case.

	 */

	err = devm_pm_opp_of_add_table(dev);

	if (err) {

		if (err == -ENODEV)

			dev_err_once(dev, "OPP table not found, please update device-tree\n");

		else

			dev_err(dev, "failed to add OPP table: %d\n", err);



		return err;

	}



	if (params->init_state) {

		err = tegra_core_dev_init_opp_state(dev);

		if (err)

			return err;

	}



	return 0;

}

EXPORT_SYMBOL_GPL(devm_tegra_core_dev_init_opp_table);

drivers/soc/tegra/fuse/fuse-tegra.c

+2 −4
Original line number Diff line number Diff line
@@ -489,9 +489,7 @@ static int __init tegra_init_fuse(void) 
		size_t size = sizeof(*fuse->lookups) * fuse->soc->num_lookups;



		fuse->lookups = kmemdup(fuse->soc->lookups, size, GFP_KERNEL);

		if (!fuse->lookups)

			return -ENOMEM;



		if (fuse->lookups)

			nvmem_add_cell_lookups(fuse->lookups, fuse->soc->num_lookups);

	}

drivers/soc/tegra/fuse/fuse-tegra30.c

+2 −1
Original line number Diff line number Diff line
@@ -37,7 +37,8 @@ 
    defined(CONFIG_ARCH_TEGRA_132_SOC) || \

    defined(CONFIG_ARCH_TEGRA_210_SOC) || \

    defined(CONFIG_ARCH_TEGRA_186_SOC) || \

    defined(CONFIG_ARCH_TEGRA_194_SOC)

    defined(CONFIG_ARCH_TEGRA_194_SOC) || \

    defined(CONFIG_ARCH_TEGRA_234_SOC)

static u32 tegra30_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset)

{

	if (WARN_ON(!fuse->base))