Commit 77ad5f6f authored by Ethan Bitnun's avatar Ethan Bitnun Committed by Alex Deucher
Browse files

drm/amd/display: Add new logs for AutoDPMTest 



[Description]
 - Add new logs to be used by the AutoDPMTest
 - Enclose AutoDPMTest logs in settings
 - Add logging definition

Reviewed-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Acked-by: default avatarStylon Wang <stylon.wang@amd.com>
Signed-off-by: default avatarEthan Bitnun <etbitnun@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fae058b4

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

+36 −0
Original line number Diff line number Diff line
@@ -450,6 +450,38 @@ static int dcn32_get_dispclk_from_dentist(struct clk_mgr *clk_mgr_base) 
	return 0;

}



static void dcn32_auto_dpm_test_log(struct dc_clocks *new_clocks, struct clk_mgr_internal *clk_mgr)

{

	////////////////////////////////////////////////////////////////////////////

	//	IMPORTANT: 	When adding more clocks to these logs, do NOT put a newline

	//	 			anywhere other than at the very end of the string.

	//

	//	Formatting example (make sure to have " - " between each entry):

	//

	//				AutoDPMTest: clk1:%d - clk2:%d - clk3:%d - clk4:%d\n"

	////////////////////////////////////////////////////////////////////////////

	if (new_clocks &&

		new_clocks->dramclk_khz > 0 &&

		new_clocks->fclk_khz > 0 &&

		new_clocks->dcfclk_khz > 0 &&

		new_clocks->dppclk_khz > 0) {



		if (new_clocks->p_state_change_support) {

			DC_LOG_AUTO_DPM_TEST("AutoDPMTest: dramclk_khz:%d - fclk_khz:%d - "

						 "dcfclk_khz:%d - dppclk_khz:%d\n",

						 new_clocks->dramclk_khz,

						 new_clocks->fclk_khz,

						 new_clocks->dcfclk_khz,

						 new_clocks->dppclk_khz);

		} else {

			DC_LOG_AUTO_DPM_TEST("AutoDPMTest: dramclk_khz:1249000 - fclk_khz:%d - "

						 "dcfclk_khz:%d - dppclk_khz:%d\n",

						 new_clocks->fclk_khz,

						 new_clocks->dcfclk_khz,

						 new_clocks->dppclk_khz);

		}

	}

}



static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base,

			struct dc_state *context,
@@ -646,6 +678,10 @@ static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base, 
		/*update dmcu for wait_loop count*/

		dmcu->funcs->set_psr_wait_loop(dmcu,

				clk_mgr_base->clks.dispclk_khz / 1000 / 7);



	if (dc->config.enable_auto_dpm_test_logs) {

	    dcn32_auto_dpm_test_log(new_clocks, clk_mgr);

	}

}



static uint32_t dcn32_get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr)

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -420,6 +420,7 @@ struct dc_config { 
	int sdpif_request_limit_words_per_umc;

	bool use_old_fixed_vs_sequence;

	bool dc_mode_clk_limit_support;

	bool enable_auto_dpm_test_logs;

};



enum visual_confirm {

drivers/gpu/drm/amd/display/include/logger_types.h

+4 −1
Original line number Diff line number Diff line
@@ -73,6 +73,7 @@ 
#define DC_LOG_SMU(...) pr_debug("[SMU_MSG]:"__VA_ARGS__)

#define DC_LOG_DWB(...) DRM_DEBUG_KMS(__VA_ARGS__)

#define DC_LOG_DP2(...) DRM_DEBUG_KMS(__VA_ARGS__)

#define DC_LOG_AUTO_DPM_TEST(...) pr_debug("[AutoDPMTest]: "__VA_ARGS__)



struct dal_logger;
@@ -128,6 +129,7 @@ enum dc_log_type { 
	LOG_SAMPLE_1DLUT,

	LOG_DP2,

	LOG_DC2RESERVED12,

	LOG_AUTO_DPM_TEST,

};



#define DC_MIN_LOG_MASK ((1 << LOG_ERROR) | \
@@ -157,7 +159,8 @@ enum dc_log_type { 
		(1ULL << LOG_IF_TRACE) | \

		(1ULL << LOG_HDMI_FRL) | \

		(1ULL << LOG_SCALER) | \

		(1ULL << LOG_DTN) /* | \

		(1ULL << LOG_DTN) | \

		(1ULL << LOG_AUTO_DPM_TEST)/* | \

		(1ULL << LOG_DEBUG) | \

		(1ULL << LOG_BIOS) | \

		(1ULL << LOG_SURFACE) | \