ASoC: dt-bindings: cirrus,cs4271: Convert to dtschema

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/sound/cirrus,cs4271.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cirrus Logic CS4271 audio CODEC

maintainers:

  - Alexander Sverdlin <alexander.sverdlin@gmail.com>

  - Nikita Shubin <nikita.shubin@maquefel.me>

description:

  The CS4271 is a stereo audio codec. This device supports both the I2C

  and the SPI bus.

allOf:

  - $ref: dai-common.yaml#

  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:

  compatible:

    const: cirrus,cs4271

  reg:

    maxItems: 1

  spi-cpha: true

  spi-cpol: true

  '#sound-dai-cells':

    const: 0

  reset-gpios:

    description:

      This pin will be deasserted before communication to the codec starts.

    maxItems: 1

  va-supply:

    description: Analog power supply.

  vd-supply:

    description: Digital power supply.

  vl-supply:

    description: Serial Control Port power supply.

  port:

    $ref: audio-graph-port.yaml#

    unevaluatedProperties: false

  cirrus,amuteb-eq-bmutec:

    description:

      When given, the Codec's AMUTEB=BMUTEC flag is enabled.

    type: boolean

  cirrus,enable-soft-reset:

    description: |

      The CS4271 requires its LRCLK and MCLK to be stable before its RESET

      line is de-asserted. That also means that clocks cannot be changed

      without putting the chip back into hardware reset, which also requires

      a complete re-initialization of all registers.

      One (undocumented) workaround is to assert and de-assert the PDN bit

      in the MODE2 register. This workaround can be enabled with this DT

      property.

      Note that this is not needed in case the clocks are stable

      throughout the entire runtime of the codec.

    type: boolean

required:

  - compatible

  - reg

unevaluatedProperties: false

examples:

  - |

    #include <dt-bindings/gpio/gpio.h>

    spi {

        #address-cells = <1>;

        #size-cells = <0>;

        codec@0 {

            compatible = "cirrus,cs4271";

            reg = <0>;

            #sound-dai-cells = <0>;

            spi-max-frequency = <6000000>;

            spi-cpol;

            spi-cpha;

            reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;

            port {

                endpoint {

                    remote-endpoint = <&i2s_ep>;

                };

            };

        };

    };

...

Cirrus Logic CS4271 DT bindings

This driver supports both the I2C and the SPI bus.

Required properties:

 - compatible: "cirrus,cs4271"

For required properties on SPI, please consult

Documentation/devicetree/bindings/spi/spi-bus.txt

Required properties on I2C:

 - reg: the i2c address

Optional properties:

 - reset-gpio: 	a GPIO spec to define which pin is connected to the chip's

		!RESET pin

 - cirrus,amuteb-eq-bmutec:	When given, the Codec's AMUTEB=BMUTEC flag

				is enabled.

 - cirrus,enable-soft-reset:

	The CS4271 requires its LRCLK and MCLK to be stable before its RESET

	line is de-asserted. That also means that clocks cannot be changed

	without putting the chip back into hardware reset, which also requires

	a complete re-initialization of all registers.

	One (undocumented) workaround is to assert and de-assert the PDN bit

	in the MODE2 register. This workaround can be enabled with this DT

	property.

	Note that this is not needed in case the clocks are stable

	throughout the entire runtime of the codec.

 - vd-supply:	Digital power

 - vl-supply:	Logic power

 - va-supply:	Analog Power

Examples:

	codec_i2c: cs4271@10 {

		compatible = "cirrus,cs4271";

		reg = <0x10>;

		reset-gpio = <&gpio 23 0>;

		vd-supply = <&vdd_3v3_reg>;

		vl-supply = <&vdd_3v3_reg>;

		va-supply = <&vdd_3v3_reg>;

	};

	codec_spi: cs4271@0 {

		compatible = "cirrus,cs4271";

		reg = <0x0>;

		reset-gpio = <&gpio 23 0>;

		spi-max-frequency = <6000000>;

	};