Unverified Commit 783bf5d0 authored by Carlos Song's avatar Carlos Song Committed by Mark Brown
Browse files

spi: spi-fsl-lpspi: limit PRESCALE bit in TCR register 



Referring to the errata ERR051608 of I.MX93, LPSPI TCR[PRESCALE]
can only be configured to be 0 or 1, other values are not valid
and will cause LPSPI to not work.

Add the prescale limitation for LPSPI in I.MX93. Other platforms
are not affected.

Signed-off-by: default avatarCarlos Song <carlos.song@nxp.com>
Link: https://patch.msgid.link/20240820070658.672127-1-carlos.song@nxp.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 57d5af26

drivers/spi/spi-fsl-lpspi.c

+29 −2
Original line number Diff line number Diff line
@@ -82,6 +82,10 @@ 
#define TCR_RXMSK	BIT(19)

#define TCR_TXMSK	BIT(18)



struct fsl_lpspi_devtype_data {

	u8 prescale_max;

};



struct lpspi_config {

	u8 bpw;

	u8 chip_select;
@@ -119,10 +123,25 @@ struct fsl_lpspi_data { 
	bool usedma;

	struct completion dma_rx_completion;

	struct completion dma_tx_completion;



	const struct fsl_lpspi_devtype_data *devtype_data;

};



/*

 * ERR051608 fixed or not:

 * https://www.nxp.com/docs/en/errata/i.MX93_1P87f.pdf

 */

static struct fsl_lpspi_devtype_data imx93_lpspi_devtype_data = {

	.prescale_max = 1,

};



static struct fsl_lpspi_devtype_data imx7ulp_lpspi_devtype_data = {

	.prescale_max = 8,

};



static const struct of_device_id fsl_lpspi_dt_ids[] = {

	{ .compatible = "fsl,imx7ulp-spi", },

	{ .compatible = "fsl,imx7ulp-spi", .data = &imx7ulp_lpspi_devtype_data,},

	{ .compatible = "fsl,imx93-spi", .data = &imx93_lpspi_devtype_data,},

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, fsl_lpspi_dt_ids);
@@ -297,9 +316,11 @@ static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi) 
{

	struct lpspi_config config = fsl_lpspi->config;

	unsigned int perclk_rate, scldiv, div;

	u8 prescale_max;

	u8 prescale;



	perclk_rate = clk_get_rate(fsl_lpspi->clk_per);

	prescale_max = fsl_lpspi->devtype_data->prescale_max;



	if (!config.speed_hz) {

		dev_err(fsl_lpspi->dev,
@@ -315,7 +336,7 @@ static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi) 


	div = DIV_ROUND_UP(perclk_rate, config.speed_hz);



	for (prescale = 0; prescale < 8; prescale++) {

	for (prescale = 0; prescale < prescale_max; prescale++) {

		scldiv = div / (1 << prescale) - 2;

		if (scldiv < 256) {

			fsl_lpspi->config.prescale = prescale;
@@ -822,6 +843,7 @@ static int fsl_lpspi_init_rpm(struct fsl_lpspi_data *fsl_lpspi) 


static int fsl_lpspi_probe(struct platform_device *pdev)

{

	const struct fsl_lpspi_devtype_data *devtype_data;

	struct fsl_lpspi_data *fsl_lpspi;

	struct spi_controller *controller;

	struct resource *res;
@@ -830,6 +852,10 @@ static int fsl_lpspi_probe(struct platform_device *pdev) 
	u32 temp;

	bool is_target;



	devtype_data = of_device_get_match_data(&pdev->dev);

	if (!devtype_data)

		return -ENODEV;



	is_target = of_property_read_bool((&pdev->dev)->of_node, "spi-slave");

	if (is_target)

		controller = devm_spi_alloc_target(&pdev->dev,
@@ -848,6 +874,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev) 
	fsl_lpspi->is_target = is_target;

	fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node,

						"fsl,spi-only-use-cs1-sel");

	fsl_lpspi->devtype_data = devtype_data;



	init_completion(&fsl_lpspi->xfer_done);