Commit 783ed446 authored by Joshua Ashton's avatar Joshua Ashton Committed by Alex Deucher
Browse files

drm/amd/display: add plane blend LUT and TF support 



Map plane blend properties to DPP blend gamma. Plane blend is a
post-3D LUT curve that linearizes color space for blending. It may be
defined by a user-blob LUT and/or predefined transfer function. As
hardcoded curve (ROM) is not supported on blend gamma, we use AMD color
module to fill parameters when setting non-linear TF with empty LUT.

v2:
- rename DRM TFs to AMDGPU TFs

Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarJoshua Ashton <joshua@froggi.es>
Signed-off-by: default avatarMelissa Wen <mwen@igalia.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8d26795a

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+1 −0
Original line number Diff line number Diff line
@@ -8271,6 +8271,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
			bundle->surface_updates[planes_count].hdr_mult = dc_plane->hdr_mult;

			bundle->surface_updates[planes_count].func_shaper = dc_plane->in_shaper_func;

			bundle->surface_updates[planes_count].lut3d_func = dc_plane->lut3d_func;

			bundle->surface_updates[planes_count].blend_tf = dc_plane->blend_tf;

		}



		amdgpu_dm_plane_fill_dc_scaling_info(dm->adev, new_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

+52 −4
Original line number Diff line number Diff line
@@ -733,6 +733,35 @@ static int amdgpu_dm_atomic_shaper_lut(const struct drm_color_lut *shaper_lut, 
	return ret;

}



static int amdgpu_dm_atomic_blend_lut(const struct drm_color_lut *blend_lut,

				       bool has_rom,

				       enum dc_transfer_func_predefined tf,

				       uint32_t blend_size,

				       struct dc_transfer_func *func_blend)

{

	int ret = 0;



	if (blend_size || tf != TRANSFER_FUNCTION_LINEAR) {

		/*

		 * DRM plane gamma LUT or TF means we are linearizing color

		 * space before blending (similar to degamma programming). As

		 * we don't have hardcoded curve support, or we use AMD color

		 * module to fill the parameters that will be translated to HW

		 * points.

		 */

		func_blend->type = TF_TYPE_DISTRIBUTED_POINTS;

		func_blend->tf = tf;

		func_blend->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;



		ret = __set_input_tf(func_blend, blend_lut, blend_size);

	} else {

		func_blend->type = TF_TYPE_BYPASS;

		func_blend->tf = TRANSFER_FUNCTION_LINEAR;

	}



	return ret;

}



/**

 * amdgpu_dm_verify_lut3d_size - verifies if 3D LUT is supported and if user

 * shaper and 3D LUTs match the hw supported size
@@ -1071,8 +1100,9 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state, 
{

	struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);

	enum amdgpu_transfer_function shaper_tf = AMDGPU_TRANSFER_FUNCTION_DEFAULT;

	const struct drm_color_lut *shaper_lut, *lut3d;

	uint32_t shaper_size, lut3d_size;

	enum amdgpu_transfer_function blend_tf = AMDGPU_TRANSFER_FUNCTION_DEFAULT;

	const struct drm_color_lut *shaper_lut, *lut3d, *blend_lut;

	uint32_t shaper_size, lut3d_size, blend_size;

	int ret;



	dc_plane_state->hdr_mult = dc_fixpt_from_s3132(dm_plane_state->hdr_mult);
@@ -1088,7 +1118,7 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state, 
					  amdgpu_tf_to_dc_tf(shaper_tf),

					  shaper_size,

					  dc_plane_state->in_shaper_func);

	if (ret)

	if (ret) {

		drm_dbg_kms(plane_state->plane->dev,

			    "setting plane %d shaper LUT failed.\n",

			    plane_state->plane->index);
@@ -1096,6 +1126,24 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state, 
		return ret;

	}



	blend_tf = dm_plane_state->blend_tf;

	blend_lut = __extract_blob_lut(dm_plane_state->blend_lut, &blend_size);

	blend_size = blend_lut != NULL ? blend_size : 0;



	ret = amdgpu_dm_atomic_blend_lut(blend_lut, false,

					 amdgpu_tf_to_dc_tf(blend_tf),

					 blend_size, dc_plane_state->blend_tf);

	if (ret) {

		drm_dbg_kms(plane_state->plane->dev,

			    "setting plane %d gamma lut failed.\n",

			    plane_state->plane->index);



		return ret;

	}



	return 0;

}



/**

 * amdgpu_dm_update_plane_color_mgmt: Maps DRM color management to DC plane.

 * @crtc: amdgpu_dm crtc state