Commit 788494ba authored by Rafał Miłecki's avatar Rafał Miłecki Committed by Daniel Lezcano
Browse files

dt-bindings: thermal: convert Mediatek Thermal to the json-schema



This helps validating DTS files. Introduced changes:
1. Improved title
2. Simplified description (dropped "This describes the device tree...")
3. Dropped undocumented "reset-names" from example

Signed-off-by: default avatarRafał Miłecki <rafal@milecki.pl>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20231117052214.24554-1-zajec5@gmail.com
parent 5f70413a
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/mediatek,thermal.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek thermal controller for on-SoC temperatures

maintainers:
  - Sascha Hauer <s.hauer@pengutronix.de>

description:
  This device does not have its own ADC, instead it directly controls the AUXADC
  via AHB bus accesses. For this reason it needs phandles to the AUXADC. Also it
  controls a mux in the apmixedsys register space via AHB bus accesses, so a
  phandle to the APMIXEDSYS is also needed.

allOf:
  - $ref: thermal-sensor.yaml#

properties:
  compatible:
    enum:
      - mediatek,mt2701-thermal
      - mediatek,mt2712-thermal
      - mediatek,mt7622-thermal
      - mediatek,mt7981-thermal
      - mediatek,mt7986-thermal
      - mediatek,mt8173-thermal
      - mediatek,mt8183-thermal
      - mediatek,mt8365-thermal
      - mediatek,mt8516-thermal

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: Main clock needed for register access
      - description: The AUXADC clock

  clock-names:
    items:
      - const: therm
      - const: auxadc

  mediatek,auxadc:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: A phandle to the AUXADC which the thermal controller uses

  mediatek,apmixedsys:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: A phandle to the APMIXEDSYS controller

  resets:
    description: Reset controller controlling the thermal controller

  nvmem-cells:
    items:
      - description:
          NVMEM cell with EEPROMA phandle to the calibration data provided by an
          NVMEM device. If unspecified default values shall be used.

  nvmem-cell-names:
    items:
      - const: calibration-data

required:
  - reg
  - interrupts
  - clocks
  - clock-names
  - mediatek,auxadc
  - mediatek,apmixedsys

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/clock/mt8173-clk.h>
    #include <dt-bindings/reset/mt8173-resets.h>

    thermal@1100b000 {
        compatible = "mediatek,mt8173-thermal";
        reg = <0x1100b000 0x1000>;
        interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
        clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
        clock-names = "therm", "auxadc";
        resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
        mediatek,auxadc = <&auxadc>;
        mediatek,apmixedsys = <&apmixedsys>;
        nvmem-cells = <&thermal_calibration_data>;
        nvmem-cell-names = "calibration-data";
        #thermal-sensor-cells = <1>;
    };
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* Mediatek Thermal

This describes the device tree binding for the Mediatek thermal controller
which measures the on-SoC temperatures. This device does not have its own ADC,
instead it directly controls the AUXADC via AHB bus accesses. For this reason
this device needs phandles to the AUXADC. Also it controls a mux in the
apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
is also needed.

Required properties:
- compatible:
  - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
  - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
  - "mediatek,mt2712-thermal" : For MT2712 family of SoCs
  - "mediatek,mt7622-thermal" : For MT7622 SoC
  - "mediatek,mt7981-thermal", "mediatek,mt7986-thermal" : For MT7981 SoC
  - "mediatek,mt7986-thermal" : For MT7986 SoC
  - "mediatek,mt8183-thermal" : For MT8183 family of SoCs
  - "mediatek,mt8365-thermal" : For MT8365 family of SoCs
  - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs
- reg: Address range of the thermal controller
- interrupts: IRQ for the thermal controller
- clocks, clock-names: Clocks needed for the thermal controller. required
                       clocks are:
		       "therm":	 Main clock needed for register access
		       "auxadc": The AUXADC clock
- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
- #thermal-sensor-cells : Should be 0. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description.

Optional properties:
- resets: Reference to the reset controller controlling the thermal controller.
- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
               unspecified default values shall be used.
- nvmem-cell-names: Should be "calibration-data"

Example:

	thermal: thermal@1100b000 {
		#thermal-sensor-cells = <1>;
		compatible = "mediatek,mt8173-thermal";
		reg = <0 0x1100b000 0 0x1000>;
		interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
		clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
		clock-names = "therm", "auxadc";
		resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
		reset-names = "therm";
		mediatek,auxadc = <&auxadc>;
		mediatek,apmixedsys = <&apmixedsys>;
		nvmem-cells = <&thermal_calibration_data>;
		nvmem-cell-names = "calibration-data";
	};