Commit 788f205f authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/wm: convert intel_wm.h external interfaces to struct intel_display



Going forward, struct intel_display is the main display device data
pointer. Convert the intel_wm.h interface as well as the hooks in struct
intel_wm_funcs to struct intel_display.

Reviewed-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/1085900b4e46bbb514e6918c321639ac380331ce.1744119460.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent cdbf0e16
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+31 −20
Original line number Diff line number Diff line
@@ -641,8 +641,9 @@ static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
	return enabled;
}

static void pnv_update_wm(struct drm_i915_private *dev_priv)
static void pnv_update_wm(struct intel_display *display)
{
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct intel_crtc *crtc;
	const struct cxsr_latency *latency;
	u32 reg;
@@ -2123,8 +2124,9 @@ static void vlv_optimize_watermarks(struct intel_atomic_state *state,
	mutex_unlock(&dev_priv->display.wm.wm_mutex);
}

static void i965_update_wm(struct drm_i915_private *dev_priv)
static void i965_update_wm(struct intel_display *display)
{
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct intel_crtc *crtc;
	int srwm = 1;
	int cursor_sr = 16;
@@ -2216,8 +2218,9 @@ static struct intel_crtc *intel_crtc_for_plane(struct drm_i915_private *i915,
	return NULL;
}

static void i9xx_update_wm(struct drm_i915_private *dev_priv)
static void i9xx_update_wm(struct intel_display *display)
{
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	const struct intel_watermark_params *wm_info;
	u32 fwater_lo;
	u32 fwater_hi;
@@ -2359,8 +2362,9 @@ static void i9xx_update_wm(struct drm_i915_private *dev_priv)
		intel_set_memory_cxsr(dev_priv, true);
}

static void i845_update_wm(struct drm_i915_private *dev_priv)
static void i845_update_wm(struct intel_display *display)
{
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct intel_crtc *crtc;
	u32 fwater_lo;
	int planea_wm;
@@ -2813,6 +2817,7 @@ static bool ilk_increase_wm_latency(struct drm_i915_private *dev_priv,

static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv)
{
	struct intel_display *display = &dev_priv->display;
	bool changed;

	/*
@@ -2828,13 +2833,14 @@ static void snb_wm_latency_quirk(struct drm_i915_private *dev_priv)

	drm_dbg_kms(&dev_priv->drm,
		    "WM latency values increased to avoid potential underruns\n");
	intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
	intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
	intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
	intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
	intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
	intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
}

static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)
{
	struct intel_display *display = &dev_priv->display;
	/*
	 * On some SNB machines (Thinkpad X220 Tablet at least)
	 * LP3 usage can cause vblank interrupts to be lost.
@@ -2857,13 +2863,15 @@ static void snb_wm_lp3_irq_quirk(struct drm_i915_private *dev_priv)

	drm_dbg_kms(&dev_priv->drm,
		    "LP3 watermarks disabled due to potential for lost interrupts\n");
	intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
	intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
	intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
	intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
	intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
	intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);
}

static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
{
	struct intel_display *display = &dev_priv->display;

	if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
		hsw_read_wm_latency(dev_priv, dev_priv->display.wm.pri_latency);
	else if (DISPLAY_VER(dev_priv) >= 6)
@@ -2879,9 +2887,9 @@ static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
	intel_fixup_spr_wm_latency(dev_priv, dev_priv->display.wm.spr_latency);
	intel_fixup_cur_wm_latency(dev_priv, dev_priv->display.wm.cur_latency);

	intel_print_wm_latency(dev_priv, "Primary", dev_priv->display.wm.pri_latency);
	intel_print_wm_latency(dev_priv, "Sprite", dev_priv->display.wm.spr_latency);
	intel_print_wm_latency(dev_priv, "Cursor", dev_priv->display.wm.cur_latency);
	intel_print_wm_latency(display, "Primary", dev_priv->display.wm.pri_latency);
	intel_print_wm_latency(display, "Sprite", dev_priv->display.wm.spr_latency);
	intel_print_wm_latency(display, "Cursor", dev_priv->display.wm.cur_latency);

	if (DISPLAY_VER(dev_priv) == 6) {
		snb_wm_latency_quirk(dev_priv);
@@ -3759,8 +3767,9 @@ static void vlv_read_wm_values(struct drm_i915_private *dev_priv,
#undef _FW_WM
#undef _FW_WM_VLV

static void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
static void g4x_wm_get_hw_state(struct intel_display *display)
{
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct g4x_wm_values *wm = &dev_priv->display.wm.g4x;
	struct intel_crtc *crtc;

@@ -3852,9 +3861,9 @@ static void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
		    str_yes_no(wm->fbc_en));
}

static void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
static void g4x_wm_sanitize(struct intel_display *display)
{
	struct intel_display *display = &dev_priv->display;
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct intel_plane *plane;
	struct intel_crtc *crtc;

@@ -3902,8 +3911,9 @@ static void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
	mutex_unlock(&dev_priv->display.wm.wm_mutex);
}

static void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv)
static void vlv_wm_get_hw_state(struct intel_display *display)
{
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct vlv_wm_values *wm = &dev_priv->display.wm.vlv;
	struct intel_crtc *crtc;
	u32 val;
@@ -4002,9 +4012,9 @@ static void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv)
		    wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr);
}

static void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
static void vlv_wm_sanitize(struct intel_display *display)
{
	struct intel_display *display = &dev_priv->display;
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct intel_plane *plane;
	struct intel_crtc *crtc;

@@ -4065,8 +4075,9 @@ static void ilk_init_lp_watermarks(struct drm_i915_private *dev_priv)
	 */
}

static void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv)
static void ilk_wm_get_hw_state(struct intel_display *display)
{
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct ilk_wm_values *hw = &dev_priv->display.wm.hw;
	struct intel_crtc *crtc;

+4 −6
Original line number Diff line number Diff line
@@ -1054,7 +1054,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
	intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);

	if (new_crtc_state->update_wm_post && new_crtc_state->hw.active)
		intel_update_watermarks(dev_priv);
		intel_update_watermarks(display);

	intel_fbc_post_update(state, crtc);

@@ -1258,7 +1258,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
		 */
		if (!intel_initial_watermarks(state, crtc))
			if (new_crtc_state->update_wm_pre)
				intel_update_watermarks(dev_priv);
				intel_update_watermarks(display);
	}

	/*
@@ -2072,7 +2072,6 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
	struct intel_display *display = to_intel_display(crtc);
	const struct intel_crtc_state *new_crtc_state =
		intel_atomic_get_new_crtc_state(state, crtc);
	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
	enum pipe pipe = crtc->pipe;

	if (drm_WARN_ON(display->drm, crtc->active))
@@ -2096,7 +2095,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
	intel_color_modeset(new_crtc_state);

	if (!intel_initial_watermarks(state, crtc))
		intel_update_watermarks(dev_priv);
		intel_update_watermarks(display);
	intel_enable_transcoder(new_crtc_state);

	intel_crtc_vblank_on(new_crtc_state);
@@ -2112,7 +2111,6 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
			      struct intel_crtc *crtc)
{
	struct intel_display *display = to_intel_display(state);
	struct drm_i915_private *dev_priv = to_i915(display->drm);
	struct intel_crtc_state *old_crtc_state =
		intel_atomic_get_old_crtc_state(state, crtc);
	enum pipe pipe = crtc->pipe;
@@ -2149,7 +2147,7 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
		intel_set_cpu_fifo_underrun_reporting(display, pipe, false);

	if (!display->funcs.wm->initial_watermarks)
		intel_update_watermarks(dev_priv);
		intel_update_watermarks(display);

	/* clock the pipe down to 640x480@60 to potentially save power */
	if (display->platform.i830)
+3 −3
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ struct intel_display_funcs {
/* functions used for watermark calcs for display. */
struct intel_wm_funcs {
	/* update_wm is for legacy wm management */
	void (*update_wm)(struct drm_i915_private *dev_priv);
	void (*update_wm)(struct intel_display *display);
	int (*compute_watermarks)(struct intel_atomic_state *state,
				  struct intel_crtc *crtc);
	void (*initial_watermarks)(struct intel_atomic_state *state,
@@ -90,8 +90,8 @@ struct intel_wm_funcs {
	void (*optimize_watermarks)(struct intel_atomic_state *state,
				    struct intel_crtc *crtc);
	int (*compute_global_watermarks)(struct intel_atomic_state *state);
	void (*get_hw_state)(struct drm_i915_private *i915);
	void (*sanitize)(struct drm_i915_private *i915);
	void (*get_hw_state)(struct intel_display *display);
	void (*sanitize)(struct intel_display *display);
};

struct intel_audio_state {
+1 −2
Original line number Diff line number Diff line
@@ -826,7 +826,6 @@ static const struct drm_info_list intel_display_debugfs_list[] = {

void intel_display_debugfs_register(struct intel_display *display)
{
	struct drm_i915_private *i915 = to_i915(display->drm);
	struct drm_minor *minor = display->drm->primary;

	debugfs_create_file("i915_fifo_underrun_reset", 0644, minor->debugfs_root,
@@ -844,7 +843,7 @@ void intel_display_debugfs_register(struct intel_display *display)
	intel_hpd_debugfs_register(display);
	intel_opregion_debugfs_register(display);
	intel_psr_debugfs_register(display);
	intel_wm_debugfs_register(i915);
	intel_wm_debugfs_register(display);
	intel_display_debugfs_params(display);
}

+1 −1
Original line number Diff line number Diff line
@@ -422,7 +422,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display)
	if (!HAS_DISPLAY(display))
		return 0;

	intel_wm_init(i915);
	intel_wm_init(display);

	intel_panel_sanitize_ssc(display);

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