Commit 78a0b13f authored by Miquel Raynal's avatar Miquel Raynal
Browse files

Merge tag 'nand/for-6.11' into mtd/next



Raw NAND changes;

The Freescale MXC driver has been converted to the newer ->exec_op()
interface. The meson driver now supports handling the boot ROM area with
very specific ECC needs. Support for the iMX8QXP has been added to the
GPMI driver. The lpx32xx driver now can get the DMA channels using DT
entries. The Qcom binding has been improved to be more future proof by
Rob. And then there is the usual load of misc and minor changes.

SPI-NAND changes:

The Macronix vendor driver has been improved to support an extended ID
to avoid conflicting with older devices after an ID reuse issue.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
parents b93f410b a503f91a
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+18 −0
Original line number Diff line number Diff line
@@ -64,11 +64,29 @@ patternProperties:
        items:
          maximum: 0

      amlogic,boot-pages:
        $ref: /schemas/types.yaml#/definitions/uint32
        description:
          Number of pages starting from offset 0, where a special ECC
          configuration must be used because it is accessed by the ROM
          code. This ECC configuration uses 384 bytes data blocks.
          Also scrambling mode is enabled for such pages.

      amlogic,boot-page-step:
        $ref: /schemas/types.yaml#/definitions/uint32
        description:
          Interval between pages, accessed by the ROM code. For example
          we have 8 pages [0, 7]. Pages 0,2,4,6 are accessed by the
          ROM code, so this field will be 2 (e.g. every 2nd page). Rest
          of pages - 1,3,5,7 are read/written without this mode.

    unevaluatedProperties: false

    dependencies:
      nand-ecc-strength: [nand-ecc-step-size]
      nand-ecc-step-size: [nand-ecc-strength]
      amlogic,boot-pages: [nand-is-boot-medium, "amlogic,boot-page-step"]
      amlogic,boot-page-step: [nand-is-boot-medium, "amlogic,boot-pages"]


required:
+22 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ properties:
          - fsl,imx6q-gpmi-nand
          - fsl,imx6sx-gpmi-nand
          - fsl,imx7d-gpmi-nand
          - fsl,imx8qxp-gpmi-nand
      - items:
          - enum:
              - fsl,imx8mm-gpmi-nand
@@ -151,6 +152,27 @@ allOf:
            - const: gpmi_io
            - const: gpmi_bch_apb

  - if:
      properties:
        compatible:
          contains:
            enum:
              - fsl,imx8qxp-gpmi-nand
    then:
      properties:
        clocks:
          items:
            - description: SoC gpmi io clock
            - description: SoC gpmi apb clock
            - description: SoC gpmi bch clock
            - description: SoC gpmi bch apb clock
        clock-names:
          items:
            - const: gpmi_io
            - const: gpmi_apb
            - const: gpmi_bch
            - const: gpmi_bch_apb

examples:
  - |
    nand-controller@8000c000 {
+14 −24
Original line number Diff line number Diff line
@@ -31,6 +31,18 @@ properties:
      - const: core
      - const: aon

  qcom,cmd-crci:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Must contain the ADM command type CRCI block instance number specified for
      the NAND controller on the given platform

  qcom,data-crci:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Must contain the ADM data type CRCI block instance number specified for
      the NAND controller on the given platform

patternProperties:
  "^nand@[a-f0-9]$":
    type: object
@@ -83,18 +95,6 @@ allOf:
          items:
            - const: rxtx

        qcom,cmd-crci:
          $ref: /schemas/types.yaml#/definitions/uint32
          description:
            Must contain the ADM command type CRCI block instance number
            specified for the NAND controller on the given platform

        qcom,data-crci:
          $ref: /schemas/types.yaml#/definitions/uint32
          description:
            Must contain the ADM data type CRCI block instance number
            specified for the NAND controller on the given platform

  - if:
      properties:
        compatible:
@@ -119,19 +119,9 @@ allOf:
            - const: rx
            - const: cmd

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,ipq806x-nand
        qcom,cmd-crci: false
        qcom,data-crci: false

    then:
      patternProperties:
        "^nand@[a-f0-9]$":
          properties:
            qcom,boot-partitions: true
    else:
      patternProperties:
        "^nand@[a-f0-9]$":
          properties:
+0 −5
Original line number Diff line number Diff line
@@ -531,11 +531,6 @@ struct cdns_nand_chip {
	u8 cs[] __counted_by(nsels);
};

struct ecc_info {
	int (*calc_ecc_bytes)(int step_size, int strength);
	int max_step_size;
};

static inline struct
cdns_nand_chip *to_cdns_nand_chip(struct nand_chip *chip)
{
+19 −1
Original line number Diff line number Diff line
@@ -983,7 +983,7 @@ static int gpmi_setup_interface(struct nand_chip *chip, int chipnr,
		return PTR_ERR(sdr);

	/* Only MX28/MX6 GPMI controller can reach EDO timings */
	if (sdr->tRC_min <= 25000 && !GPMI_IS_MX28(this) && !GPMI_IS_MX6(this))
	if (sdr->tRC_min <= 25000 && !this->devdata->support_edo_timing)
		return -ENOTSUPP;

	/* Stop here if this call was just a check */
@@ -1142,6 +1142,7 @@ static const struct gpmi_devdata gpmi_devdata_imx28 = {
	.type = IS_MX28,
	.bch_max_ecc_strength = 20,
	.max_chain_delay = 16000,
	.support_edo_timing = true,
	.clks = gpmi_clks_for_mx2x,
	.clks_count = ARRAY_SIZE(gpmi_clks_for_mx2x),
};
@@ -1154,6 +1155,7 @@ static const struct gpmi_devdata gpmi_devdata_imx6q = {
	.type = IS_MX6Q,
	.bch_max_ecc_strength = 40,
	.max_chain_delay = 12000,
	.support_edo_timing = true,
	.clks = gpmi_clks_for_mx6,
	.clks_count = ARRAY_SIZE(gpmi_clks_for_mx6),
};
@@ -1162,6 +1164,7 @@ static const struct gpmi_devdata gpmi_devdata_imx6sx = {
	.type = IS_MX6SX,
	.bch_max_ecc_strength = 62,
	.max_chain_delay = 12000,
	.support_edo_timing = true,
	.clks = gpmi_clks_for_mx6,
	.clks_count = ARRAY_SIZE(gpmi_clks_for_mx6),
};
@@ -1174,10 +1177,24 @@ static const struct gpmi_devdata gpmi_devdata_imx7d = {
	.type = IS_MX7D,
	.bch_max_ecc_strength = 62,
	.max_chain_delay = 12000,
	.support_edo_timing = true,
	.clks = gpmi_clks_for_mx7d,
	.clks_count = ARRAY_SIZE(gpmi_clks_for_mx7d),
};

static const char *gpmi_clks_for_mx8qxp[GPMI_CLK_MAX] = {
	"gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb",
};

static const struct gpmi_devdata gpmi_devdata_imx8qxp = {
	.type = IS_MX8QXP,
	.bch_max_ecc_strength = 62,
	.max_chain_delay = 12000,
	.support_edo_timing = true,
	.clks = gpmi_clks_for_mx8qxp,
	.clks_count = ARRAY_SIZE(gpmi_clks_for_mx8qxp),
};

static int acquire_register_block(struct gpmi_nand_data *this,
				  const char *res_name)
{
@@ -2721,6 +2738,7 @@ static const struct of_device_id gpmi_nand_id_table[] = {
	{ .compatible = "fsl,imx6q-gpmi-nand", .data = &gpmi_devdata_imx6q, },
	{ .compatible = "fsl,imx6sx-gpmi-nand", .data = &gpmi_devdata_imx6sx, },
	{ .compatible = "fsl,imx7d-gpmi-nand", .data = &gpmi_devdata_imx7d,},
	{ .compatible = "fsl,imx8qxp-gpmi-nand", .data = &gpmi_devdata_imx8qxp, },
	{}
};
MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
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