Commit 793a1352 authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe/mmio: Drop compatibility macros 



Now that all parts of the driver have switched over to using xe_mmio for
direct register access, we can drop the compatibility macros that allow
continued xe_gt usage.

v2:
 - Move removal of 8/16-bit read and xe_mmio_wait32_not() wrappers to
   this patch rather than removing them in earlier patches when last
   caller was removed.  (Rodrigo)

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-88-matthew.d.roper@intel.com
parent a851edc4

drivers/gpu/drm/xe/xe_mmio.c

+19 −19
Original line number Diff line number Diff line
@@ -199,7 +199,7 @@ static void mmio_flush_pending_writes(struct xe_mmio *mmio) 
		writel(0, mmio->regs + DUMMY_REG_OFFSET);

}



u8 __xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)

u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)

{

	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);

	u8 val;
@@ -213,7 +213,7 @@ u8 __xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg) 
	return val;

}



u16 __xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)

u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)

{

	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);

	u16 val;
@@ -227,7 +227,7 @@ u16 __xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg) 
	return val;

}



void __xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)

void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)

{

	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
@@ -239,7 +239,7 @@ void __xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val) 
		writel(val, mmio->regs + addr);

}



u32 __xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)

u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)

{

	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);

	u32 val;
@@ -257,7 +257,7 @@ u32 __xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg) 
	return val;

}



u32 __xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set)

u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set)

{

	u32 old, reg_val;
@@ -268,7 +268,7 @@ u32 __xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set) 
	return old;

}



int __xe_mmio_write32_and_verify(struct xe_mmio *mmio,

int xe_mmio_write32_and_verify(struct xe_mmio *mmio,

			       struct xe_reg reg, u32 val, u32 mask, u32 eval)

{

	u32 reg_val;
@@ -279,7 +279,7 @@ int __xe_mmio_write32_and_verify(struct xe_mmio *mmio, 
	return (reg_val & mask) != eval ? -EINVAL : 0;

}



bool __xe_mmio_in_range(const struct xe_mmio *mmio,

bool xe_mmio_in_range(const struct xe_mmio *mmio,

		      const struct xe_mmio_range *range,

		      struct xe_reg reg)

{
@@ -310,7 +310,7 @@ bool __xe_mmio_in_range(const struct xe_mmio *mmio, 
 *

 * Returns the value of the 64-bit register.

 */

u64 __xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)

u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)

{

	struct xe_reg reg_udw = { .addr = reg.addr + 0x4 };

	u32 ldw, udw, oldudw, retries;
@@ -338,7 +338,7 @@ u64 __xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg) 
	return (u64)udw << 32 | ldw;

}



static int ____xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

			    u32 *out_val, bool atomic, bool expect_match)

{

	ktime_t cur = ktime_get_raw();
@@ -410,10 +410,10 @@ static int ____xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, 
 * @timeout_us for different reasons, specially in non-atomic contexts. Thus,

 * it is possible that this function succeeds even after @timeout_us has passed.

 */

int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

		   u32 *out_val, bool atomic)

{

	return ____xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);

	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, true);

}



/**
@@ -429,8 +429,8 @@ int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, 
 * This function works exactly like xe_mmio_wait32() with the exception that

 * @val is expected not to be matched.

 */

int __xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

		       u32 *out_val, bool atomic)

{

	return ____xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, false);

	return __xe_mmio_wait32(mmio, reg, mask, val, timeout_us, out_val, atomic, false);

}

drivers/gpu/drm/xe/xe_mmio.h

+15 −52
Original line number Diff line number Diff line
@@ -14,63 +14,26 @@ struct xe_reg; 
int xe_mmio_init(struct xe_device *xe);

int xe_mmio_probe_tiles(struct xe_device *xe);



/*

 * Temporary transition helper for xe_gt -> xe_mmio conversion.  Allows

 * continued usage of xe_gt as a parameter to MMIO operations which now

 * take an xe_mmio structure instead.  Will be removed once the driver-wide

 * conversion is complete.

 */

#define __to_xe_mmio(ptr) \

	_Generic(ptr, \

		 const struct xe_gt *: (&((const struct xe_gt *)(ptr))->mmio), \

		 struct xe_gt *: (&((struct xe_gt *)(ptr))->mmio), \

		 const struct xe_mmio *: (ptr), \

		 struct xe_mmio *: (ptr))



u8 __xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);

#define xe_mmio_read8(p, reg) __xe_mmio_read8(__to_xe_mmio(p), reg)



u16 __xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);

#define xe_mmio_read16(p, reg) __xe_mmio_read16(__to_xe_mmio(p), reg)



void __xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);

#define xe_mmio_write32(p, reg, val) __xe_mmio_write32(__to_xe_mmio(p), reg, val)



u32 __xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);

#define xe_mmio_read32(p, reg) __xe_mmio_read32(__to_xe_mmio(p), reg)



u32 __xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);

#define xe_mmio_rmw32(p, reg, clr, set) __xe_mmio_rmw32(__to_xe_mmio(p), reg, clr, set)



int __xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg,

				 u32 val, u32 mask, u32 eval);

#define xe_mmio_write32_and_verify(p, reg, val, mask, eval) \

	__xe_mmio_write32_and_verify(__to_xe_mmio(p), reg, val, mask, eval)



bool __xe_mmio_in_range(const struct xe_mmio *mmio,

			const struct xe_mmio_range *range, struct xe_reg reg);

#define xe_mmio_in_range(p, range, reg) __xe_mmio_in_range(__to_xe_mmio(p), range, reg)



u64 __xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);

#define xe_mmio_read64_2x32(p, reg) __xe_mmio_read64_2x32(__to_xe_mmio(p), reg)



int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,

u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);

u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);

void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);

u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);

u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);

int xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg, u32 val, u32 mask, u32 eval);

bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *range, struct xe_reg reg);



u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);

int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,

		   u32 timeout_us, u32 *out_val, bool atomic);

#define xe_mmio_wait32(p, reg, mask, val, timeout_us, out_val, atomic) \

	__xe_mmio_wait32(__to_xe_mmio(p), reg, mask, val, timeout_us, out_val, atomic)



int __xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,

int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,

		       u32 val, u32 timeout_us, u32 *out_val, bool atomic);

#define xe_mmio_wait32_not(p, reg, mask, val, timeout_us, out_val, atomic) \

	__xe_mmio_wait32_not(__to_xe_mmio(p), reg, mask, val, timeout_us, out_val, atomic)



static inline u32 __xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)

static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)

{

	if (addr < mmio->adj_limit)

		addr += mmio->adj_offset;

	return addr;

}

#define xe_mmio_adjusted_addr(p, addr) __xe_mmio_adjusted_addr(__to_xe_mmio(p), addr)



static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)

{