Commit 793b97c4 authored by Sathishkumar S's avatar Sathishkumar S Committed by Alex Deucher
Browse files

drm/amdgpu/vcn: Register dump cleanup in VCN4_0_5 



Use generic vcn devcoredump helper functions for VCN4_0_5

Signed-off-by: default avatarSathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4e011af9

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

+5 −75
Original line number Diff line number Diff line
@@ -147,9 +147,6 @@ static int vcn_v4_0_5_sw_init(struct amdgpu_ip_block *ip_block) 
	struct amdgpu_ring *ring;

	struct amdgpu_device *adev = ip_block->adev;

	int i, r;

	uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_5);

	uint32_t *ptr;





	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

		volatile struct amdgpu_vcn4_fw_shared *fw_shared;
@@ -233,15 +230,9 @@ static int vcn_v4_0_5_sw_init(struct amdgpu_ip_block *ip_block) 
			return r;

	}



	/* Allocate memory for VCN IP Dump buffer */

	ptr = kcalloc(adev->vcn.num_vcn_inst * reg_count, sizeof(uint32_t), GFP_KERNEL);

	if (!ptr) {

		DRM_ERROR("Failed to allocate memory for VCN IP Dump\n");

		adev->vcn.ip_dump = NULL;

	} else {

		adev->vcn.ip_dump = ptr;

	}

	return 0;

	r = amdgpu_vcn_reg_dump_init(adev, vcn_reg_list_4_0_5, ARRAY_SIZE(vcn_reg_list_4_0_5));



	return r;

}



/**
@@ -1710,67 +1701,6 @@ static void vcn_v4_0_5_set_irq_funcs(struct amdgpu_device *adev) 
	}

}



static void vcn_v4_0_5_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p)

{

	struct amdgpu_device *adev = ip_block->adev;

	int i, j;

	uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_5);

	uint32_t inst_off, is_powered;



	if (!adev->vcn.ip_dump)

		return;



	drm_printf(p, "num_instances:%d\n", adev->vcn.num_vcn_inst);

	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

		if (adev->vcn.harvest_config & (1 << i)) {

			drm_printf(p, "\nHarvested Instance:VCN%d Skipping dump\n", i);

			continue;

		}



		inst_off = i * reg_count;

		is_powered = (adev->vcn.ip_dump[inst_off] &

				UVD_POWER_STATUS__UVD_POWER_STATUS_MASK) != 1;



		if (is_powered) {

			drm_printf(p, "\nActive Instance:VCN%d\n", i);

			for (j = 0; j < reg_count; j++)

				drm_printf(p, "%-50s \t 0x%08x\n", vcn_reg_list_4_0_5[j].reg_name,

					   adev->vcn.ip_dump[inst_off + j]);

		} else {

			drm_printf(p, "\nInactive Instance:VCN%d\n", i);

		}

	}

}



static void vcn_v4_0_5_dump_ip_state(struct amdgpu_ip_block *ip_block)

{

	struct amdgpu_device *adev = ip_block->adev;

	int i, j;

	bool is_powered;

	uint32_t inst_off;

	uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_5);



	if (!adev->vcn.ip_dump)

		return;



	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

		if (adev->vcn.harvest_config & (1 << i))

			continue;



		inst_off = i * reg_count;

		/* mmUVD_POWER_STATUS is always readable and is first element of the array */

		adev->vcn.ip_dump[inst_off] = RREG32_SOC15(VCN, i, regUVD_POWER_STATUS);

		is_powered = (adev->vcn.ip_dump[inst_off] &

				UVD_POWER_STATUS__UVD_POWER_STATUS_MASK) != 1;



		if (is_powered)

			for (j = 1; j < reg_count; j++)

				adev->vcn.ip_dump[inst_off + j] =

					RREG32(SOC15_REG_ENTRY_OFFSET_INST(vcn_reg_list_4_0_5[j],

									   i));

	}

}



static const struct amd_ip_funcs vcn_v4_0_5_ip_funcs = {

	.name = "vcn_v4_0_5",

	.early_init = vcn_v4_0_5_early_init,
@@ -1784,8 +1714,8 @@ static const struct amd_ip_funcs vcn_v4_0_5_ip_funcs = { 
	.wait_for_idle = vcn_v4_0_5_wait_for_idle,

	.set_clockgating_state = vcn_v4_0_5_set_clockgating_state,

	.set_powergating_state = vcn_set_powergating_state,

	.dump_ip_state = vcn_v4_0_5_dump_ip_state,

	.print_ip_state = vcn_v4_0_5_print_ip_state,

	.dump_ip_state = amdgpu_vcn_dump_ip_state,

	.print_ip_state = amdgpu_vcn_print_ip_state,

};



const struct amdgpu_ip_block_version vcn_v4_0_5_ip_block = {