Commit 793fa8ce authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amdgpu: cleanup sriov function for psp v12 



PSP v12 won't have SRIOV function.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4a89b769

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

+17 −35
Original line number Diff line number Diff line
@@ -147,23 +147,6 @@ static int psp_v12_0_ring_create(struct psp_context *psp, 
	struct psp_ring *ring = &psp->km_ring;

	struct amdgpu_device *adev = psp->adev;



	if (amdgpu_sriov_vf(psp->adev)) {

		/* Write low address of the ring to C2PMSG_102 */

		psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);

		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);

		/* Write high address of the ring to C2PMSG_103 */

		psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr);

		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg);



		/* Write the ring initialization command to C2PMSG_101 */

		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

					     GFX_CTRL_CMD_ID_INIT_GPCOM_RING);



		/* Wait for response flag (bit 31) in C2PMSG_101 */

		ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101),

				   0x80000000, 0x8000FFFF, false);



	} else {

	/* Write low address of the ring to C2PMSG_69 */

	psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);

	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);
@@ -181,7 +164,6 @@ static int psp_v12_0_ring_create(struct psp_context *psp, 
	/* Wait for response flag (bit 31) in C2PMSG_64 */

	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),

			   0x80000000, 0x8000FFFF, false);

	}



	return ret;

}