Commit 79acf83e authored by Ralf Baechle's avatar Ralf Baechle
Browse files

Moves a test which determines if we actually need to perform a 


cacheflush to the right place.  That's a bug which is harmless on UP
but a severe bug on SMP.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c6e8b587

arch/mips/mm/c-r4k.c

+7 −7
Original line number Diff line number Diff line
@@ -376,6 +376,13 @@ static inline void local_r4k_flush_cache_page(void *args) 
	pmd_t *pmdp;

	pte_t *ptep;



	/*

	 * If ownes no valid ASID yet, cannot possibly have gotten

	 * this page into the cache.

	 */

	if (cpu_context(smp_processor_id(), vma->vm_mm) == 0)

		return;



	page &= PAGE_MASK;

	pgdp = pgd_offset(mm, page);

	pudp = pud_offset(pgdp, page);
@@ -432,13 +439,6 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma, unsigned long page, 
{

	struct flush_cache_page_args args;



	/*

	 * If ownes no valid ASID yet, cannot possibly have gotten

	 * this page into the cache.

	 */

	if (cpu_context(smp_processor_id(), vma->vm_mm) == 0)

		return;



	args.vma = vma;

	args.page = page;