Commit 79b3c037 authored by Ivan Lipski's avatar Ivan Lipski Committed by Alex Deucher
Browse files

drm/amd/display: Clear the CUR_ENABLE register on DCN20 on DPP5 

[Why]
On DCN20 & DCN30, the 6th DPP's & HUBP's are powered on permanently and
cannot be power gated. Thus, when dpp_reset() is invoked for the DPP5,
while it's still powered on, the cached cursor_state
(dpp_base->pos.cur0_ctl.bits.cur0_enable)
and the actual state (CUR0_ENABLE) bit are unsycned. This can cause a
double cursor in full screen with non-native scaling.

[How]
Force disable cursor on DPP5 on plane powerdown for ASICs w/ 6 DPPs/HUBPs.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4673


Reviewed-by: default avatarAric Cyr <aric.cyr@amd.com>
Signed-off-by: default avatarIvan Lipski <ivan.lipski@amd.com>
Tested-by: default avatarDan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1a7322e9

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

+8 −0
Original line number Diff line number Diff line
@@ -614,6 +614,14 @@ void dcn20_dpp_pg_control( 
		 *		DOMAIN11_PGFSM_PWR_STATUS, pwr_status,

		 * 		1, 1000);

		 */



		/* Force disable cursor on plane powerdown on DPP 5 using dpp_force_disable_cursor */

		if (!power_on) {

			struct dpp *dpp5 = hws->ctx->dc->res_pool->dpps[dpp_inst];

			if (dpp5 && dpp5->funcs->dpp_force_disable_cursor)

				dpp5->funcs->dpp_force_disable_cursor(dpp5);

		}



		break;

	default:

		BREAK_TO_DEBUGGER();