Commit 79be257b authored by Quan Zhou's avatar Quan Zhou Committed by Anup Patel
Browse files

RISC-V: KVM: Allow Ziccrse extension for Guest/VM 



Extend the KVM ISA extension ONE_REG interface to allow KVM user space
to detect and enable Ziccrse extension for Guest/VM.

Signed-off-by: default avatarQuan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/d10e746d165074174f830aa3d89bf3c92017acee.1732854096.git.zhouquan@iscas.ac.cn


Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 679e132c

arch/riscv/include/uapi/asm/kvm.h

+1 −0
Original line number Diff line number Diff line
@@ -181,6 +181,7 @@ enum KVM_RISCV_ISA_EXT_ID { 
	KVM_RISCV_ISA_EXT_SVADU,

	KVM_RISCV_ISA_EXT_SVVPTC,

	KVM_RISCV_ISA_EXT_ZABHA,

	KVM_RISCV_ISA_EXT_ZICCRSE,

	KVM_RISCV_ISA_EXT_MAX,

};

arch/riscv/kvm/vcpu_onereg.c

+2 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ static const unsigned long kvm_isa_ext_arr[] = { 
	KVM_ISA_EXT_ARR(ZFHMIN),

	KVM_ISA_EXT_ARR(ZICBOM),

	KVM_ISA_EXT_ARR(ZICBOZ),

	KVM_ISA_EXT_ARR(ZICCRSE),

	KVM_ISA_EXT_ARR(ZICNTR),

	KVM_ISA_EXT_ARR(ZICOND),

	KVM_ISA_EXT_ARR(ZICSR),
@@ -166,6 +167,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) 
	case KVM_RISCV_ISA_EXT_ZFA:

	case KVM_RISCV_ISA_EXT_ZFH:

	case KVM_RISCV_ISA_EXT_ZFHMIN:

	case KVM_RISCV_ISA_EXT_ZICCRSE:

	case KVM_RISCV_ISA_EXT_ZICNTR:

	case KVM_RISCV_ISA_EXT_ZICOND:

	case KVM_RISCV_ISA_EXT_ZICSR: