Commit 7a470e82 authored by Sohil Mehta's avatar Sohil Mehta Committed by Ingo Molnar
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x86/cpufeatures: Free up unused feature bits 



Linux defined feature bits X86_FEATURE_P3 and X86_FEATURE_P4 are not
used anywhere. Commit f31d731e ("x86: use X86_FEATURE_NOPL in
alternatives") got rid of the last usage in 2008. Remove the related
mappings and code.

Just like all X86_FEATURE bits, the raw bit numbers can be exposed to
userspace via MODULE_DEVICE_TABLE(). There is a very small theoretical
chance of userspace getting confused if these bits got reassigned and
changed logical meaning.  But these bits were never used for a device
table, so it's highly unlikely this will ever happen in practice.

[ dhansen: clarify userspace visibility of these bits ]

Signed-off-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/all/20241107233000.2742619-1-sohil.mehta%40intel.com
parent b8f52214

arch/x86/include/asm/cpufeatures.h

+2 −2
Original line number Diff line number Diff line
@@ -83,8 +83,8 @@ 
#define X86_FEATURE_CENTAUR_MCR		( 3*32+ 3) /* "centaur_mcr" Centaur MCRs (= MTRRs) */

#define X86_FEATURE_K8			( 3*32+ 4) /* Opteron, Athlon64 */

#define X86_FEATURE_ZEN5		( 3*32+ 5) /* CPU based on Zen5 microarchitecture */

#define X86_FEATURE_P3			( 3*32+ 6) /* P3 */

#define X86_FEATURE_P4			( 3*32+ 7) /* P4 */

/* Free                                 ( 3*32+ 6) */

/* Free                                 ( 3*32+ 7) */

#define X86_FEATURE_CONSTANT_TSC	( 3*32+ 8) /* "constant_tsc" TSC ticks at a constant rate */

#define X86_FEATURE_UP			( 3*32+ 9) /* "up" SMP kernel running on UP */

#define X86_FEATURE_ART			( 3*32+10) /* "art" Always running timer (ART) */

arch/x86/kernel/cpu/intel.c

+0 −5
Original line number Diff line number Diff line
@@ -597,11 +597,6 @@ static void init_intel(struct cpuinfo_x86 *c) 
		if (p)

			strcpy(c->x86_model_id, p);

	}



	if (c->x86 == 15)

		set_cpu_cap(c, X86_FEATURE_P4);

	if (c->x86 == 6)

		set_cpu_cap(c, X86_FEATURE_P3);

#endif



	/* Work around errata */