Loading drivers/net/tg3.c +33 −21 Original line number Diff line number Diff line Loading @@ -4662,6 +4662,35 @@ static void tg3_write_sig_legacy(struct tg3 *tp, int kind) } } static int tg3_poll_fw(struct tg3 *tp) { int i; u32 val; /* Wait for firmware initialization to complete. */ for (i = 0; i < 100000; i++) { tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) break; udelay(10); } /* Chip might not be fitted with firmware. Some Sun onboard * parts are configured like that. So don't signal the timeout * of the above loop as an error, but do report the lack of * running firmware once. */ if (i >= 100000 && !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) { tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED; printk(KERN_INFO PFX "%s: No firmware running.\n", tp->dev->name); } return 0; } static void tg3_stop_fw(struct tg3 *); /* tp->lock is held. */ Loading @@ -4669,7 +4698,7 @@ static int tg3_chip_reset(struct tg3 *tp) { u32 val; void (*write_op)(struct tg3 *, u32, u32); int i; int err; tg3_nvram_lock(tp); Loading Loading @@ -4829,26 +4858,9 @@ static int tg3_chip_reset(struct tg3 *tp) tw32_f(MAC_MODE, 0); udelay(40); /* Wait for firmware initialization to complete. */ for (i = 0; i < 100000; i++) { tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) break; udelay(10); } /* Chip might not be fitted with firmare. Some Sun onboard * parts are configured like that. So don't signal the timeout * of the above loop as an error, but do report the lack of * running firmware once. */ if (i >= 100000 && !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) { tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED; printk(KERN_INFO PFX "%s: No firmware running.\n", tp->dev->name); } err = tg3_poll_fw(tp); if (err) return err; if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) { Loading Loading
drivers/net/tg3.c +33 −21 Original line number Diff line number Diff line Loading @@ -4662,6 +4662,35 @@ static void tg3_write_sig_legacy(struct tg3 *tp, int kind) } } static int tg3_poll_fw(struct tg3 *tp) { int i; u32 val; /* Wait for firmware initialization to complete. */ for (i = 0; i < 100000; i++) { tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) break; udelay(10); } /* Chip might not be fitted with firmware. Some Sun onboard * parts are configured like that. So don't signal the timeout * of the above loop as an error, but do report the lack of * running firmware once. */ if (i >= 100000 && !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) { tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED; printk(KERN_INFO PFX "%s: No firmware running.\n", tp->dev->name); } return 0; } static void tg3_stop_fw(struct tg3 *); /* tp->lock is held. */ Loading @@ -4669,7 +4698,7 @@ static int tg3_chip_reset(struct tg3 *tp) { u32 val; void (*write_op)(struct tg3 *, u32, u32); int i; int err; tg3_nvram_lock(tp); Loading Loading @@ -4829,26 +4858,9 @@ static int tg3_chip_reset(struct tg3 *tp) tw32_f(MAC_MODE, 0); udelay(40); /* Wait for firmware initialization to complete. */ for (i = 0; i < 100000; i++) { tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) break; udelay(10); } /* Chip might not be fitted with firmare. Some Sun onboard * parts are configured like that. So don't signal the timeout * of the above loop as an error, but do report the lack of * running firmware once. */ if (i >= 100000 && !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) { tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED; printk(KERN_INFO PFX "%s: No firmware running.\n", tp->dev->name); } err = tg3_poll_fw(tp); if (err) return err; if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) { Loading