Unverified Commit 7a874e8b authored by Luis de Arquer's avatar Luis de Arquer Committed by Mark Brown
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spi-rockchip: Fix register out of bounds access



Do not write native chip select stuff for GPIO chip selects.
GPIOs can be numbered much higher than native CS.
Also, it makes no sense.

Signed-off-by: default avatarLuis de Arquer <luis.dearquer@inertim.com>
Link: https://patch.msgid.link/365ccddfba110549202b3520f4401a6a936e82a8.camel@gmail.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent ee2ecf2c
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+1 −1
Original line number Diff line number Diff line
@@ -547,7 +547,7 @@ static int rockchip_spi_config(struct rockchip_spi *rs,
	cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
	if (spi->mode & SPI_LSB_FIRST)
		cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET;
	if (spi->mode & SPI_CS_HIGH)
	if ((spi->mode & SPI_CS_HIGH) && !(spi_get_csgpiod(spi, 0)))
		cr0 |= BIT(spi_get_chipselect(spi, 0)) << CR0_SOI_OFFSET;

	if (xfer->rx_buf && xfer->tx_buf)