Commit 7a9d0318 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
Browse files

clk: renesas: r9a09g077: Use devm_ helpers for divider clock registration 



Convert the divider clock registration in the R9A09G077 CPG driver to use
device-managed (devm_) helper functions.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251028165127.991351-4-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 3b32a075

drivers/clk/renesas/r9a09g077-cpg.c

+16 −14
Original line number Diff line number Diff line
@@ -220,8 +220,9 @@ r9a09g077_cpg_div_clk_register(struct device *dev, 
	parent_name = __clk_get_name(parent);



	if (core->dtable)

		clk_hw = clk_hw_register_divider_table(dev, core->name,

						       parent_name, CLK_SET_RATE_PARENT,

		clk_hw = devm_clk_hw_register_divider_table(dev, core->name,

							    parent_name,

							    CLK_SET_RATE_PARENT,

							    addr,

							    GET_SHIFT(core->conf),

							    GET_WIDTH(core->conf),
@@ -229,8 +230,9 @@ r9a09g077_cpg_div_clk_register(struct device *dev, 
							    core->dtable,

							    &pub->rmw_lock);

	else

		clk_hw = clk_hw_register_divider(dev, core->name,

						 parent_name, CLK_SET_RATE_PARENT,

		clk_hw = devm_clk_hw_register_divider(dev, core->name,

						      parent_name,

						      CLK_SET_RATE_PARENT,

						      addr,

						      GET_SHIFT(core->conf),

						      GET_WIDTH(core->conf),