Commit 7b365f05 authored by Jie Gan's avatar Jie Gan Committed by Suzuki K Poulose
Browse files

Coresight: Change to read the trace ID from coresight_path



The source device can directly read the trace ID from the coresight_path
which result in etm_read_alloc_trace_id and etm4_read_alloc_trace_id being
deleted.

Co-developed-by: default avatarJames Clark <james.clark@linaro.org>
Signed-off-by: default avatarJames Clark <james.clark@linaro.org>
Signed-off-by: default avatarJie Gan <quic_jiegan@quicinc.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250303032931.2500935-7-quic_jiegan@quicinc.com
parent d87d76d8
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+1 −1
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ DEFINE_CORESIGHT_DEVLIST(sink_devs, "dummy_sink");

static int dummy_source_enable(struct coresight_device *csdev,
			       struct perf_event *event, enum cs_mode mode,
			       __maybe_unused struct coresight_trace_id_map *id_map)
			       __maybe_unused struct coresight_path *path)
{
	if (!coresight_take_mode(csdev, mode))
		return -EBUSY;
+2 −6
Original line number Diff line number Diff line
@@ -461,7 +461,6 @@ static void etm_event_start(struct perf_event *event, int flags)
	struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
	struct coresight_path *path;
	u64 hw_id;
	u8 trace_id;

	if (!csdev)
		goto fail;
@@ -504,8 +503,7 @@ static void etm_event_start(struct perf_event *event, int flags)
		goto fail_end_stop;

	/* Finally enable the tracer */
	if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF,
				      &sink->perf_sink_id_map))
	if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF, path))
		goto fail_disable_path;

	/*
@@ -515,13 +513,11 @@ static void etm_event_start(struct perf_event *event, int flags)
	if (!cpumask_test_cpu(cpu, &event_data->aux_hwid_done)) {
		cpumask_set_cpu(cpu, &event_data->aux_hwid_done);

		trace_id = coresight_trace_id_read_cpu_id_map(cpu, &sink->perf_sink_id_map);

		hw_id = FIELD_PREP(CS_AUX_HW_ID_MAJOR_VERSION_MASK,
				CS_AUX_HW_ID_MAJOR_VERSION);
		hw_id |= FIELD_PREP(CS_AUX_HW_ID_MINOR_VERSION_MASK,
				CS_AUX_HW_ID_MINOR_VERSION);
		hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, trace_id);
		hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, path->trace_id);
		hw_id |= FIELD_PREP(CS_AUX_HW_ID_SINK_ID_MASK, coresight_get_sink_id(sink));

		perf_report_aux_output_id(event, hw_id);
+0 −1
Original line number Diff line number Diff line
@@ -284,6 +284,5 @@ extern const struct attribute_group *coresight_etm_groups[];
void etm_set_default(struct etm_config *config);
void etm_config_trace_mode(struct etm_config *config);
struct etm_config *get_etm_config(struct etm_drvdata *drvdata);
int etm_read_alloc_trace_id(struct etm_drvdata *drvdata);
void etm_release_trace_id(struct etm_drvdata *drvdata);
#endif
+7 −47
Original line number Diff line number Diff line
@@ -455,26 +455,6 @@ static int etm_cpu_id(struct coresight_device *csdev)
	return drvdata->cpu;
}

int etm_read_alloc_trace_id(struct etm_drvdata *drvdata)
{
	int trace_id;

	/*
	 * This will allocate a trace ID to the cpu,
	 * or return the one currently allocated.
	 *
	 * trace id function has its own lock
	 */
	trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu);
	if (IS_VALID_CS_TRACE_ID(trace_id))
		drvdata->traceid = (u8)trace_id;
	else
		dev_err(&drvdata->csdev->dev,
			"Failed to allocate trace ID for %s on CPU%d\n",
			dev_name(&drvdata->csdev->dev), drvdata->cpu);
	return trace_id;
}

void etm_release_trace_id(struct etm_drvdata *drvdata)
{
	coresight_trace_id_put_cpu_id(drvdata->cpu);
@@ -482,38 +462,22 @@ void etm_release_trace_id(struct etm_drvdata *drvdata)

static int etm_enable_perf(struct coresight_device *csdev,
			   struct perf_event *event,
			   struct coresight_trace_id_map *id_map)
			   struct coresight_path *path)
{
	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
	int trace_id;

	if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id()))
		return -EINVAL;

	/* Configure the tracer based on the session's specifics */
	etm_parse_event_config(drvdata, event);

	/*
	 * perf allocates cpu ids as part of _setup_aux() - device needs to use
	 * the allocated ID. This reads the current version without allocation.
	 *
	 * This does not use the trace id lock to prevent lock_dep issues
	 * with perf locks - we know the ID cannot change until perf shuts down
	 * the session
	 */
	trace_id = coresight_trace_id_read_cpu_id_map(drvdata->cpu, id_map);
	if (!IS_VALID_CS_TRACE_ID(trace_id)) {
		dev_err(&drvdata->csdev->dev, "Failed to set trace ID for %s on CPU%d\n",
			dev_name(&drvdata->csdev->dev), drvdata->cpu);
		return -EINVAL;
	}
	drvdata->traceid = (u8)trace_id;
	drvdata->traceid = path->trace_id;

	/* And enable it */
	return etm_enable_hw(drvdata);
}

static int etm_enable_sysfs(struct coresight_device *csdev)
static int etm_enable_sysfs(struct coresight_device *csdev, struct coresight_path *path)
{
	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
	struct etm_enable_arg arg = { };
@@ -521,10 +485,7 @@ static int etm_enable_sysfs(struct coresight_device *csdev)

	spin_lock(&drvdata->spinlock);

	/* sysfs needs to allocate and set a trace ID */
	ret = etm_read_alloc_trace_id(drvdata);
	if (ret < 0)
		goto unlock_enable_sysfs;
	drvdata->traceid = path->trace_id;

	/*
	 * Configure the ETM only if the CPU is online.  If it isn't online
@@ -545,7 +506,6 @@ static int etm_enable_sysfs(struct coresight_device *csdev)
	if (ret)
		etm_release_trace_id(drvdata);

unlock_enable_sysfs:
	spin_unlock(&drvdata->spinlock);

	if (!ret)
@@ -554,7 +514,7 @@ static int etm_enable_sysfs(struct coresight_device *csdev)
}

static int etm_enable(struct coresight_device *csdev, struct perf_event *event,
		      enum cs_mode mode, struct coresight_trace_id_map *id_map)
		      enum cs_mode mode, struct coresight_path *path)
{
	int ret;
	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
@@ -566,10 +526,10 @@ static int etm_enable(struct coresight_device *csdev, struct perf_event *event,

	switch (mode) {
	case CS_MODE_SYSFS:
		ret = etm_enable_sysfs(csdev);
		ret = etm_enable_sysfs(csdev, path);
		break;
	case CS_MODE_PERF:
		ret = etm_enable_perf(csdev, event, id_map);
		ret = etm_enable_perf(csdev, event, path);
		break;
	default:
		ret = -EINVAL;
+8 −46
Original line number Diff line number Diff line
@@ -232,25 +232,6 @@ static int etm4_cpu_id(struct coresight_device *csdev)
	return drvdata->cpu;
}

int etm4_read_alloc_trace_id(struct etmv4_drvdata *drvdata)
{
	int trace_id;

	/*
	 * This will allocate a trace ID to the cpu,
	 * or return the one currently allocated.
	 * The trace id function has its own lock
	 */
	trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu);
	if (IS_VALID_CS_TRACE_ID(trace_id))
		drvdata->trcid = (u8)trace_id;
	else
		dev_err(&drvdata->csdev->dev,
			"Failed to allocate trace ID for %s on CPU%d\n",
			dev_name(&drvdata->csdev->dev), drvdata->cpu);
	return trace_id;
}

void etm4_release_trace_id(struct etmv4_drvdata *drvdata)
{
	coresight_trace_id_put_cpu_id(drvdata->cpu);
@@ -810,9 +791,9 @@ static int etm4_parse_event_config(struct coresight_device *csdev,

static int etm4_enable_perf(struct coresight_device *csdev,
			    struct perf_event *event,
			    struct coresight_trace_id_map *id_map)
			    struct coresight_path *path)
{
	int ret = 0, trace_id;
	int ret = 0;
	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);

	if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id())) {
@@ -825,22 +806,7 @@ static int etm4_enable_perf(struct coresight_device *csdev,
	if (ret)
		goto out;

	/*
	 * perf allocates cpu ids as part of _setup_aux() - device needs to use
	 * the allocated ID. This reads the current version without allocation.
	 *
	 * This does not use the trace id lock to prevent lock_dep issues
	 * with perf locks - we know the ID cannot change until perf shuts down
	 * the session
	 */
	trace_id = coresight_trace_id_read_cpu_id_map(drvdata->cpu, id_map);
	if (!IS_VALID_CS_TRACE_ID(trace_id)) {
		dev_err(&drvdata->csdev->dev, "Failed to set trace ID for %s on CPU%d\n",
			dev_name(&drvdata->csdev->dev), drvdata->cpu);
		ret = -EINVAL;
		goto out;
	}
	drvdata->trcid = (u8)trace_id;
	drvdata->trcid = path->trace_id;

	/* And enable it */
	ret = etm4_enable_hw(drvdata);
@@ -849,7 +815,7 @@ static int etm4_enable_perf(struct coresight_device *csdev,
	return ret;
}

static int etm4_enable_sysfs(struct coresight_device *csdev)
static int etm4_enable_sysfs(struct coresight_device *csdev, struct coresight_path *path)
{
	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
	struct etm4_enable_arg arg = { };
@@ -866,10 +832,7 @@ static int etm4_enable_sysfs(struct coresight_device *csdev)

	spin_lock(&drvdata->spinlock);

	/* sysfs needs to read and allocate a trace ID */
	ret = etm4_read_alloc_trace_id(drvdata);
	if (ret < 0)
		goto unlock_sysfs_enable;
	drvdata->trcid = path->trace_id;

	/*
	 * Executing etm4_enable_hw on the cpu whose ETM is being enabled
@@ -886,7 +849,6 @@ static int etm4_enable_sysfs(struct coresight_device *csdev)
	if (ret)
		etm4_release_trace_id(drvdata);

unlock_sysfs_enable:
	spin_unlock(&drvdata->spinlock);

	if (!ret)
@@ -895,7 +857,7 @@ static int etm4_enable_sysfs(struct coresight_device *csdev)
}

static int etm4_enable(struct coresight_device *csdev, struct perf_event *event,
		       enum cs_mode mode, struct coresight_trace_id_map *id_map)
		       enum cs_mode mode, struct coresight_path *path)
{
	int ret;

@@ -906,10 +868,10 @@ static int etm4_enable(struct coresight_device *csdev, struct perf_event *event,

	switch (mode) {
	case CS_MODE_SYSFS:
		ret = etm4_enable_sysfs(csdev);
		ret = etm4_enable_sysfs(csdev, path);
		break;
	case CS_MODE_PERF:
		ret = etm4_enable_perf(csdev, event, id_map);
		ret = etm4_enable_perf(csdev, event, path);
		break;
	default:
		ret = -EINVAL;
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