Commit 7b541d55 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvmarm-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD 

KVM/arm64 changes for 6.13, part #1

 - Support for stage-1 permission indirection (FEAT_S1PIE) and
   permission overlays (FEAT_S1POE), including nested virt + the
   emulated page table walker

 - Introduce PSCI SYSTEM_OFF2 support to KVM + client driver. This call
   was introduced in PSCIv1.3 as a mechanism to request hibernation,
   similar to the S4 state in ACPI

 - Explicitly trap + hide FEAT_MPAM (QoS controls) from KVM guests. As
   part of it, introduce trivial initialization of the host's MPAM
   context so KVM can use the corresponding traps

 - PMU support under nested virtualization, honoring the guest
   hypervisor's trap configuration and event filtering when running a
   nested guest

 - Fixes to vgic ITS serialization where stale device/interrupt table
   entries are not zeroed when the mapping is invalidated by the VM

 - Avoid emulated MMIO completion if userspace has requested synchronous
   external abort injection

 - Various fixes and cleanups affecting pKVM, vCPU initialization, and
   selftests
parents b467ab82 60ad25e1

Documentation/arch/arm64/cpu-feature-registers.rst

+2 −0
Original line number Diff line number Diff line
@@ -152,6 +152,8 @@ infrastructure: 
     +------------------------------+---------+---------+

     | DIT                          | [51-48] |    y    |

     +------------------------------+---------+---------+

     | MPAM                         | [43-40] |    n    |

     +------------------------------+---------+---------+

     | SVE                          | [35-32] |    y    |

     +------------------------------+---------+---------+

     | GIC                          | [27-24] |    n    |

Documentation/virt/kvm/api.rst

+10 −0
Original line number Diff line number Diff line
@@ -6857,6 +6857,10 @@ the first `ndata` items (possibly zero) of the data array are valid. 
   the guest issued a SYSTEM_RESET2 call according to v1.1 of the PSCI

   specification.



 - for arm64, data[0] is set to KVM_SYSTEM_EVENT_SHUTDOWN_FLAG_PSCI_OFF2

   if the guest issued a SYSTEM_OFF2 call according to v1.3 of the PSCI

   specification.



 - for RISC-V, data[0] is set to the value of the second argument of the

   ``sbi_system_reset`` call.
@@ -6890,6 +6894,12 @@ either: 
 - Deny the guest request to suspend the VM. See ARM DEN0022D.b 5.19.2

   "Caller responsibilities" for possible return values.



Hibernation using the PSCI SYSTEM_OFF2 call is enabled when PSCI v1.3

is enabled. If a guest invokes the PSCI SYSTEM_OFF2 function, KVM will

exit to userspace with the KVM_SYSTEM_EVENT_SHUTDOWN event type and with

data[0] set to KVM_SYSTEM_EVENT_SHUTDOWN_FLAG_PSCI_OFF2. The only

supported hibernate type for the SYSTEM_OFF2 function is HIBERNATE_OFF.



::



		/* KVM_EXIT_IOAPIC_EOI */

arch/arm64/include/asm/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ struct cpuinfo_arm64 { 
	u64		reg_revidr;

	u64		reg_gmid;

	u64		reg_smidr;

	u64		reg_mpamidr;



	u64		reg_id_aa64dfr0;

	u64		reg_id_aa64dfr1;

arch/arm64/include/asm/cpucaps.h

+5 −0
Original line number Diff line number Diff line
@@ -60,6 +60,11 @@ cpucap_is_possible(const unsigned int cap) 
		return IS_ENABLED(CONFIG_ARM64_WORKAROUND_REPEAT_TLBI);

	case ARM64_WORKAROUND_SPECULATIVE_SSBS:

		return IS_ENABLED(CONFIG_ARM64_ERRATUM_3194386);

	case ARM64_MPAM:

		/*

		 * KVM MPAM support doesn't rely on the host kernel supporting MPAM.

		*/

		return true;

	}



	return true;

arch/arm64/include/asm/cpufeature.h

+17 −0
Original line number Diff line number Diff line
@@ -612,6 +612,13 @@ static inline bool id_aa64pfr1_sme(u64 pfr1) 
	return val > 0;

}



static inline bool id_aa64pfr0_mpam(u64 pfr0)

{

	u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT);



	return val > 0;

}



static inline bool id_aa64pfr1_mte(u64 pfr1)

{

	u32 val = cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_EL1_MTE_SHIFT);
@@ -838,6 +845,16 @@ static inline bool system_supports_poe(void) 
		alternative_has_cap_unlikely(ARM64_HAS_S1POE);

}



static __always_inline bool system_supports_mpam(void)

{

	return alternative_has_cap_unlikely(ARM64_MPAM);

}



static __always_inline bool system_supports_mpam_hcr(void)

{

	return alternative_has_cap_unlikely(ARM64_MPAM_HCR);

}



int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt);

bool try_emulate_mrs(struct pt_regs *regs, u32 isn);