Commit 7c01dc25 authored by Alexandre Courbot's avatar Alexandre Courbot
Browse files

gpu: nova-core: compute layout of more framebuffer regions required for GSP 



Compute more of the required FB layout information to boot the GSP
firmware.

This information is dependent on the firmware itself, so first we need
to import and abstract the required firmware bindings in the `nvfw`
module.

Then, a new FB HAL method is introduced in `fb::hal` that uses these
bindings and hardware information to compute the correct layout
information.

This information is then used in `fb` and the result made visible in
`FbLayout`.

These 3 things are grouped into the same patch to avoid lots of unused
warnings that would be tedious to work around. As they happen in
different files, they should not be too difficult to track separately.

Acked-by: default avatarDanilo Krummrich <dakr@kernel.org>
Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-1-8ae4058e3c0e@nvidia.com>
parent e54ad0cd

drivers/gpu/nova-core/fb.rs

+67 −4
Original line number Diff line number Diff line
@@ -16,9 +16,14 @@ 
use crate::{

    dma::DmaObject,

    driver::Bar0,

    firmware::gsp::GspFirmware,

    gpu::Chipset,

    num::usize_as_u64,

    regs, //

    gsp,

    num::{

        usize_as_u64,

        FromSafeCast, //

    },

    regs,

};



mod hal;
@@ -95,14 +100,27 @@ pub(crate) fn unregister(&self, bar: &Bar0) { 
#[derive(Debug)]

#[expect(dead_code)]

pub(crate) struct FbLayout {

    /// Range of the framebuffer. Starts at `0`.

    pub(crate) fb: Range<u64>,

    /// VGA workspace, small area of reserved memory at the end of the framebuffer.

    pub(crate) vga_workspace: Range<u64>,

    /// FRTS range.

    pub(crate) frts: Range<u64>,

    /// Memory area containing the GSP bootloader image.

    pub(crate) boot: Range<u64>,

    /// Memory area containing the GSP firmware image.

    pub(crate) elf: Range<u64>,

    /// WPR2 heap.

    pub(crate) wpr2_heap: Range<u64>,

    /// WPR2 region range, starting with an instance of `GspFwWprMeta`.

    pub(crate) wpr2: Range<u64>,

    pub(crate) heap: Range<u64>,

    pub(crate) vf_partition_count: u8,

}



impl FbLayout {

    /// Computes the FB layout.

    pub(crate) fn new(chipset: Chipset, bar: &Bar0) -> Result<Self> {

    /// Computes the FB layout for `chipset` required to run the `gsp_fw` GSP firmware.

    pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw: &GspFirmware) -> Result<Self> {

        let hal = hal::fb_hal(chipset);



        let fb = {
@@ -146,10 +164,55 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0) -> Result<Self> { 
            frts_base..frts_base + FRTS_SIZE

        };



        let boot = {

            const BOOTLOADER_DOWN_ALIGN: Alignment = Alignment::new::<SZ_4K>();

            let bootloader_size = u64::from_safe_cast(gsp_fw.bootloader.ucode.size());

            let bootloader_base = (frts.start - bootloader_size).align_down(BOOTLOADER_DOWN_ALIGN);



            bootloader_base..bootloader_base + bootloader_size

        };



        let elf = {

            const ELF_DOWN_ALIGN: Alignment = Alignment::new::<SZ_64K>();

            let elf_size = u64::from_safe_cast(gsp_fw.size);

            let elf_addr = (boot.start - elf_size).align_down(ELF_DOWN_ALIGN);



            elf_addr..elf_addr + elf_size

        };



        let wpr2_heap = {

            const WPR2_HEAP_DOWN_ALIGN: Alignment = Alignment::new::<SZ_1M>();

            let wpr2_heap_size =

                gsp::LibosParams::from_chipset(chipset).wpr_heap_size(chipset, fb.end);

            let wpr2_heap_addr = (elf.start - wpr2_heap_size).align_down(WPR2_HEAP_DOWN_ALIGN);



            wpr2_heap_addr..(elf.start).align_down(WPR2_HEAP_DOWN_ALIGN)

        };



        let wpr2 = {

            const WPR2_DOWN_ALIGN: Alignment = Alignment::new::<SZ_1M>();

            let wpr2_addr = (wpr2_heap.start - u64::from_safe_cast(size_of::<gsp::GspFwWprMeta>()))

                .align_down(WPR2_DOWN_ALIGN);



            wpr2_addr..frts.end

        };



        let heap = {

            const HEAP_SIZE: u64 = usize_as_u64(SZ_1M);



            wpr2.start - HEAP_SIZE..wpr2.start

        };



        Ok(Self {

            fb,

            vga_workspace,

            frts,

            boot,

            elf,

            wpr2_heap,

            wpr2,

            heap,

            vf_partition_count: 0,

        })

    }

}

drivers/gpu/nova-core/firmware/gsp.rs

+2 −2
Original line number Diff line number Diff line
@@ -143,11 +143,11 @@ pub(crate) struct GspFirmware { 
    /// Level 0 page table (single 4KB page) with one entry: DMA address of first level 1 page.

    level0: DmaObject,

    /// Size in bytes of the firmware contained in [`Self::fw`].

    size: usize,

    pub(crate) size: usize,

    /// Device-mapped GSP signatures matching the GPU's [`Chipset`].

    signatures: DmaObject,

    /// GSP bootloader, verifies the GSP firmware before loading and running it.

    bootloader: RiscvFirmware,

    pub(crate) bootloader: RiscvFirmware,

}



impl GspFirmware {

drivers/gpu/nova-core/firmware/riscv.rs

+1 −1
Original line number Diff line number Diff line
@@ -68,7 +68,7 @@ pub(crate) struct RiscvFirmware { 
    /// Application version.

    app_version: u32,

    /// Device-mapped firmware image.

    ucode: DmaObject,

    pub(crate) ucode: DmaObject,

}



impl RiscvFirmware {

drivers/gpu/nova-core/gsp.rs

+5 −0
Original line number Diff line number Diff line
@@ -6,6 +6,11 @@ 


mod fw;



pub(crate) use fw::{

    GspFwWprMeta,

    LibosParams, //

};



pub(crate) const GSP_PAGE_SHIFT: usize = 12;

pub(crate) const GSP_PAGE_SIZE: usize = 1 << GSP_PAGE_SHIFT;

drivers/gpu/nova-core/gsp/boot.rs

+2 −2
Original line number Diff line number Diff line
@@ -127,12 +127,12 @@ pub(crate) fn boot( 


        let bios = Vbios::new(dev, bar)?;



        let _gsp_fw = KBox::pin_init(

        let gsp_fw = KBox::pin_init(

            GspFirmware::new(dev, chipset, FIRMWARE_VERSION)?,

            GFP_KERNEL,

        )?;



        let fb_layout = FbLayout::new(chipset, bar)?;

        let fb_layout = FbLayout::new(chipset, bar, &gsp_fw)?;

        dev_dbg!(dev, "{:#x?}\n", fb_layout);



        Self::run_fwsec_frts(dev, gsp_falcon, bar, &bios, &fb_layout)?;