Commit 7c0b8360 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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dt-bindings: clock: renesas,r9a09g077/87: Add XSPI0/1 IDs 



Add clock definitions for XSPI0/1 to both R9A09G077 and R9A09G087 SoCs.
These definitions are required for describing XSPI devices in DT

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251028165127.991351-5-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 3a866087

include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h

+2 −0
Original line number Diff line number Diff line
@@ -31,5 +31,7 @@ 
#define R9A09G077_ETCLKC		19

#define R9A09G077_ETCLKD		20

#define R9A09G077_ETCLKE		21

#define R9A09G077_XSPI_CLK0		22

#define R9A09G077_XSPI_CLK1		23



#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */

include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h

+2 −0
Original line number Diff line number Diff line
@@ -31,5 +31,7 @@ 
#define R9A09G087_ETCLKC		19

#define R9A09G087_ETCLKD		20

#define R9A09G087_ETCLKE		21

#define R9A09G087_XSPI_CLK0		22

#define R9A09G087_XSPI_CLK1		23



#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G087_CPG_H__ */