Commit 7c8730df authored by Niklas Söderlund's avatar Niklas Söderlund Committed by Geert Uytterhoeven
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clk: renesas: r8a779h0: Add CSI-2 clocks



Add the CSI40 and CSI41 module clocks, which are used by the CSI-2
interfaces on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240527131541.1676525-4-niklas.soderlund+renesas@ragnatech.se


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent babc0ea4
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Original line number Diff line number Diff line
@@ -176,6 +176,8 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
	DEF_MOD("avb0:rgmii0",	211,	R8A779H0_CLK_S0D8_HSC),
	DEF_MOD("avb1:rgmii1",	212,	R8A779H0_CLK_S0D8_HSC),
	DEF_MOD("avb2:rgmii2",	213,	R8A779H0_CLK_S0D8_HSC),
	DEF_MOD("csi40",	331,	R8A779H0_CLK_CSI),
	DEF_MOD("csi41",	400,	R8A779H0_CLK_CSI),
	DEF_MOD("hscif0",	514,	R8A779H0_CLK_SASYNCPERD1),
	DEF_MOD("hscif1",	515,	R8A779H0_CLK_SASYNCPERD1),
	DEF_MOD("hscif2",	516,	R8A779H0_CLK_SASYNCPERD1),