Commit 7cc3d502 authored by Anson Huang's avatar Anson Huang Committed by Rob Herring
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dt-bindings: memory-controllers: Convert mmdc to json-schema 



Convert the MMDC memory controller binding to DT schema format using
json-schema.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1596161184-24266-1-git-send-email-Anson.Huang@nxp.com


Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent f69f15a3

Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt

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Freescale Multi Mode DDR controller (MMDC)



Required properties :

- compatible : should be one of following:

	for i.MX6Q/i.MX6DL:

	- "fsl,imx6q-mmdc";

	for i.MX6QP:

	- "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";

	for i.MX6SL:

	- "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc";

	for i.MX6SLL:

	- "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc";

	for i.MX6SX:

	- "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc";

	for i.MX6UL/i.MX6ULL/i.MX6ULZ:

	- "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";

	for i.MX7ULP:

	- "fsl,imx7ulp-mmdc", "fsl,imx6q-mmdc";

- reg : address and size of MMDC DDR controller registers



Optional properties :

- clocks : the clock provided by the SoC to access the MMDC registers



Example :

	mmdc0: memory-controller@21b0000 { /* MMDC0 */

		compatible = "fsl,imx6q-mmdc";

		reg = <0x021b0000 0x4000>;

		clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;

	};



	mmdc1: memory-controller@21b4000 { /* MMDC1 */

		compatible = "fsl,imx6q-mmdc";

		reg = <0x021b4000 0x4000>;

		status = "disabled";

	};

Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/memory-controllers/fsl/mmdc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale Multi Mode DDR controller (MMDC)



maintainers:

  - Anson Huang <Anson.Huang@nxp.com>



properties:

  compatible:

    oneOf:

      - const: fsl,imx6q-mmdc

      - items:

          - enum:

            - fsl,imx6qp-mmdc

            - fsl,imx6sl-mmdc

            - fsl,imx6sll-mmdc

            - fsl,imx6sx-mmdc

            - fsl,imx6ul-mmdc

            - fsl,imx7ulp-mmdc

          - const: fsl,imx6q-mmdc



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



required:

  - compatible

  - reg



examples:

  - |

    #include <dt-bindings/clock/imx6qdl-clock.h>



    memory-controller@21b0000 {

        compatible = "fsl,imx6q-mmdc";

        reg = <0x021b0000 0x4000>;

        clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;

    };



    memory-controller@21b4000 {

        compatible = "fsl,imx6q-mmdc";

        reg = <0x021b4000 0x4000>;

    };