Commit 7cd0c655 authored by Jason Gunthorpe's avatar Jason Gunthorpe Committed by Joerg Roedel
Browse files

iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST 



This driver used to use a lot of page table constants from the architecture
code which prevented COMPILE_TEST on other architectures. Now that iommupt
provides all of the constants internally there are only two small bumps
preventing COMPILE_TEST.

- Use the generic functions for the riscv specific phys_to_pfn() and
  pfn_to_phys()

- Use CONFIG_MMIOWB to block off the mmiowb() barrier

- Require 64 bit because of writeq use failing compilation on 32 bit

Tested-by: default avatarVincent Chen <vincent.chen@sifive.com>
Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv
Reviewed-by: default avatarTomasz Jeznach <tjeznach@rivosinc.com>
Tested-by: default avatarTomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent c70d20b2

drivers/iommu/riscv/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -3,9 +3,9 @@ 


config RISCV_IOMMU

	bool "RISC-V IOMMU Support"

	depends on RISCV && 64BIT

	default RISCV

	depends on GENERIC_MSI_IRQ

	default y

	depends on (RISCV || COMPILE_TEST) && 64BIT

	select IOMMU_API

	select GENERIC_PT

	select IOMMU_PT

drivers/iommu/riscv/iommu-bits.h

+3 −1
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <linux/types.h>

#include <linux/bitfield.h>

#include <linux/bits.h>

#include <asm/page.h>



/*

 * Chapter 5: Memory Mapped register interface
@@ -718,7 +719,8 @@ static inline void riscv_iommu_cmd_inval_vma(struct riscv_iommu_command *cmd) 
static inline void riscv_iommu_cmd_inval_set_addr(struct riscv_iommu_command *cmd,

						  u64 addr)

{

	cmd->dword1 = FIELD_PREP(RISCV_IOMMU_CMD_IOTINVAL_ADDR, phys_to_pfn(addr));

	cmd->dword1 =

		FIELD_PREP(RISCV_IOMMU_CMD_IOTINVAL_ADDR, PHYS_PFN(addr));

	cmd->dword0 |= RISCV_IOMMU_CMD_IOTINVAL_AV;

}

drivers/iommu/riscv/iommu.c

+3 −1
Original line number Diff line number Diff line
@@ -160,7 +160,7 @@ static int riscv_iommu_queue_alloc(struct riscv_iommu_device *iommu, 
	if (FIELD_GET(RISCV_IOMMU_PPN_FIELD, qb)) {

		const size_t queue_size = entry_size << (logsz + 1);



		queue->phys = pfn_to_phys(FIELD_GET(RISCV_IOMMU_PPN_FIELD, qb));

		queue->phys = PFN_PHYS(FIELD_GET(RISCV_IOMMU_PPN_FIELD, qb));

		queue->base = devm_ioremap(iommu->dev, queue->phys, queue_size);

	} else {

		do {
@@ -436,7 +436,9 @@ static unsigned int riscv_iommu_queue_send(struct riscv_iommu_queue *queue, 
	 * 6. Make sure the doorbell write to the device has finished before updating

	 *    the shadow tail index in normal memory. 'fence o, w'

	 */

#ifdef CONFIG_MMIOWB

	mmiowb();

#endif

	atomic_inc(&queue->tail);



	/* 7. Complete submission and restore local interrupts */