dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML

* Freescale i.MX6 UltraLite IOMUX Controller

Please refer to fsl,imx-pinctrl.txt in this directory for common binding part

and usage.

Required properties:

- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or

  "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.

- fsl,pins: each entry consists of 6 integers and represents the mux and config

  setting for one pin.  The first 5 integers <mux_reg conf_reg input_reg mux_val

  input_val> are specified using a PIN_FUNC_ID macro, which can be found in

  imx6ul-pinfunc.h under device tree source folder.  The last integer CONFIG is

  the pad setting value like pull-up on this pin.  Please refer to i.MX6 UltraLite

  Reference Manual for detailed CONFIG settings.

CONFIG bits definition:

PAD_CTL_HYS                     (1 << 16)

PAD_CTL_PUS_100K_DOWN           (0 << 14)

PAD_CTL_PUS_47K_UP              (1 << 14)

PAD_CTL_PUS_100K_UP             (2 << 14)

PAD_CTL_PUS_22K_UP              (3 << 14)

PAD_CTL_PUE                     (1 << 13)

PAD_CTL_PKE                     (1 << 12)

PAD_CTL_ODE                     (1 << 11)

PAD_CTL_SPEED_LOW               (0 << 6)

PAD_CTL_SPEED_MED               (1 << 6)

PAD_CTL_SPEED_HIGH              (3 << 6)

PAD_CTL_DSE_DISABLE             (0 << 3)

PAD_CTL_DSE_260ohm              (1 << 3)

PAD_CTL_DSE_130ohm              (2 << 3)

PAD_CTL_DSE_87ohm               (3 << 3)

PAD_CTL_DSE_65ohm               (4 << 3)

PAD_CTL_DSE_52ohm               (5 << 3)

PAD_CTL_DSE_43ohm               (6 << 3)

PAD_CTL_DSE_37ohm               (7 << 3)

PAD_CTL_SRE_FAST                (1 << 0)

PAD_CTL_SRE_SLOW                (0 << 0)

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale IMX6UL IOMUX Controller

maintainers:

  - Dong Aisheng <aisheng.dong@nxp.com>

description:

  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory

  for common binding part and usage.

allOf:

  - $ref: pinctrl.yaml#

properties:

  compatible:

    enum:

      - fsl,imx6ul-iomuxc

      - fsl,imx6ull-iomuxc-snvs

  reg:

    maxItems: 1

# Client device subnode's properties

patternProperties:

  'grp$':

    type: object

    description:

      Pinctrl node's client devices use subnodes for desired pin configuration.

      Client device subnodes use below standard properties.

    properties:

      fsl,pins:

        description:

          each entry consists of 6 integers and represents the mux and config

          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg

          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can

          be found in <arch/arm/boot/dts/imx6ul-pinfunc.h>. The last integer

          CONFIG is the pad setting value like pull-up on this pin. Please

          refer to i.MX6UL Reference Manual for detailed CONFIG settings.

        $ref: /schemas/types.yaml#/definitions/uint32-matrix

        items:

          items:

            - description: |

                "mux_reg" indicates the offset of mux register.

            - description: |

                "conf_reg" indicates the offset of pad configuration register.

            - description: |

                "input_reg" indicates the offset of select input register.

            - description: |

                "mux_val" indicates the mux value to be applied.

            - description: |

                "input_val" indicates the select input value to be applied.

            - description: |

                "pad_setting" indicates the pad configuration value to be applied:

                  PAD_CTL_HYS                     (1 << 16)

                  PAD_CTL_PUS_100K_DOWN           (0 << 14)

                  PAD_CTL_PUS_47K_UP              (1 << 14)

                  PAD_CTL_PUS_100K_UP             (2 << 14)

                  PAD_CTL_PUS_22K_UP              (3 << 14)

                  PAD_CTL_PUE                     (1 << 13)

                  PAD_CTL_PKE                     (1 << 12)

                  PAD_CTL_ODE                     (1 << 11)

                  PAD_CTL_SPEED_LOW               (0 << 6)

                  PAD_CTL_SPEED_MED               (1 << 6)

                  PAD_CTL_SPEED_HIGH              (3 << 6)

                  PAD_CTL_DSE_DISABLE             (0 << 3)

                  PAD_CTL_DSE_260ohm              (1 << 3)

                  PAD_CTL_DSE_130ohm              (2 << 3)

                  PAD_CTL_DSE_87ohm               (3 << 3)

                  PAD_CTL_DSE_65ohm               (4 << 3)

                  PAD_CTL_DSE_52ohm               (5 << 3)

                  PAD_CTL_DSE_43ohm               (6 << 3)

                  PAD_CTL_DSE_37ohm               (7 << 3)

                  PAD_CTL_SRE_FAST                (1 << 0)

                  PAD_CTL_SRE_SLOW                (0 << 0)

    required:

      - fsl,pins

    additionalProperties: false

required:

  - compatible

  - reg

additionalProperties: false

examples:

  - |

    iomuxc: pinctrl@20e0000 {

      compatible = "fsl,imx6ul-iomuxc";

      reg = <0x020e0000 0x4000>;

      mux_uart: uartgrp {

        fsl,pins = <

          0x0084 0x0310 0x0000 0 0 0x1b0b1

          0x0088 0x0314 0x0624 0 3 0x1b0b1

        >;

      };

    };

  - |

    iomuxc_snvs: pinctrl@2290000 {

      compatible = "fsl,imx6ull-iomuxc-snvs";

      reg = <0x02290000 0x4000>;

      pinctrl_snvs_usbc_det: snvsusbcdetgrp {

        fsl,pins = <

          0x0010 0x0054 0x0000 0x5 0x0 0x130b0

        >;

      };

    };