Commit 7d041982 authored by Andrew Mazour's avatar Andrew Mazour Committed by Alex Deucher
Browse files

drm/amd/display: Extend inbox0 lock to run Replay/PSR 



[Why]
The inbox1 infrastructure is deprecated, so to support display
power features requiring a DMUB interlock moving forward extend
the inbox0 locking conditions to also include Replay or PSR.

[How]
Implemented a series of changes to improve HW lock handling:
- Deprecated should_use_dmub_inbox1_lock() and guarded it with
  DCN401 flag.
- Migrated lock checks into inbox0 helpers and added PSR/Replay
  enablement checks to ensure correct behavior.
- Updated HWSS fast update path to acquire HW lock as needed
  using the new helpers.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarAndrew Mazour <Andrew.Mazour@amd.com>
Signed-off-by: default avatarRay Wu <ray.wu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent face6a36

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

+4 −1
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ 
#include "dccg.h"

#include "abm.h"

#include "dcn10/dcn10_hubbub.h"

#include "dce/dmub_hw_lock_mgr.h"



#define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0]))

#define MAX_NUM_MCACHE 8
@@ -764,7 +765,9 @@ void hwss_build_fast_sequence(struct dc *dc, 
	if (dc->hwss.dmub_hw_control_lock_fast) {

		block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.dc = dc;

		block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.lock = true;

		block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.is_required = dc_state_is_fams2_in_use(dc, context);

		block_sequence[*num_steps].params.dmub_hw_control_lock_fast_params.is_required =

			dc_state_is_fams2_in_use(dc, context) ||

			dmub_hw_lock_mgr_does_link_require_lock(dc, stream->link);

		block_sequence[*num_steps].func = DMUB_HW_CONTROL_LOCK_FAST;

		(*num_steps)++;

	}

drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c

+35 −17
Original line number Diff line number Diff line
@@ -61,31 +61,49 @@ void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv, 
	dc_dmub_srv_wait_for_inbox0_ack(dmub_srv);

}



bool should_use_dmub_inbox1_lock(const struct dc *dc, const struct dc_link *link)

bool dmub_hw_lock_mgr_does_link_require_lock(const struct dc *dc, const struct dc_link *link)

{

	/* ASIC doesn't support DMUB */

	if (!dc->ctx->dmub_srv)

	if (!link)

		return false;



	if (link) {



	if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)

		return true;



	if (link->replay_settings.replay_feature_enabled)

		return true;



			/* only use HW lock for PSR1 on single eDP */

	if (link->psr_settings.psr_version == DC_PSR_VERSION_1) {

		struct dc_link *edp_links[MAX_NUM_EDP];

		int edp_num;



		dc_get_edp_links(dc, edp_links, &edp_num);



		if (edp_num == 1)

			return true;

	}

	return false;

}



bool dmub_hw_lock_mgr_does_context_require_lock(const struct dc *dc, const struct dc_state *context)

{

	if (!context)

		return false;

	for (int i = 0; i < context->stream_count; i++) {

		const struct dc_link *link = context->streams[i]->link;



		if (dmub_hw_lock_mgr_does_link_require_lock(dc, link))

			return true;

	}

	return false;

}



bool should_use_dmub_inbox1_lock(const struct dc *dc, const struct dc_link *link)

{

	/* ASIC doesn't support DMUB */

	if (!dc->ctx->dmub_srv)

		return false;



	if (dc->ctx->dce_version >= DCN_VERSION_4_01)

		return false;



	return dmub_hw_lock_mgr_does_link_require_lock(dc, link);

}

drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h

+2 −0
Original line number Diff line number Diff line
@@ -46,5 +46,7 @@ void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv, 
 * Return: true if the inbox1 lock should be used, false otherwise

 */

bool should_use_dmub_inbox1_lock(const struct dc *dc, const struct dc_link *link);

bool dmub_hw_lock_mgr_does_link_require_lock(const struct dc *dc, const struct dc_link *link);

bool dmub_hw_lock_mgr_does_context_require_lock(const struct dc *dc, const struct dc_state *context);



#endif /*_DMUB_HW_LOCK_MGR_H_ */