Commit 7d113cce authored by Mitul Golani's avatar Mitul Golani Committed by Suraj Kandpal
Browse files

drm/i915/bmg: Read display register timeout



Log the address of the register that caused the timeout
interrupt by reading RMTIMEOUTREG_CAPTURE

--v2:
- Update RMTIMEOUTREG_CAPTURE naming (Suraj)

--v3:
- XeLpdp naming convention.
- Use if condition instead of else if

Signed-off-by: default avatarMitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240807142106.1270213-1-mitulkumar.ajitkumar.golani@intel.com
parent 372f244b
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+8 −1
Original line number Diff line number Diff line
@@ -906,6 +906,13 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
			intel_pmdemand_irq_handler(dev_priv);
			found = true;
		}

		if (iir & XELPDP_RM_TIMEOUT) {
			u32 val = intel_uncore_read(&dev_priv->uncore,
						    RM_TIMEOUT_REG_CAPTURE);
			drm_warn(&dev_priv->drm, "Register Access Timeout = 0x%x\n", val);
			found = true;
		}
	} else if (iir & GEN8_DE_MISC_GSE) {
		intel_opregion_asle_intr(dev_priv);
		found = true;
@@ -1710,7 +1717,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)

	if (DISPLAY_VER(dev_priv) >= 14) {
		de_misc_masked |= XELPDP_PMDEMAND_RSPTOUT_ERR |
				  XELPDP_PMDEMAND_RSP;
				  XELPDP_PMDEMAND_RSP | XELPDP_RM_TIMEOUT;
	} else if (DISPLAY_VER(dev_priv) >= 11) {
		enum port port;

+2 −0
Original line number Diff line number Diff line
@@ -2396,6 +2396,7 @@

/* Display Internal Timeout Register */
#define RM_TIMEOUT		_MMIO(0x42060)
#define RM_TIMEOUT_REG_CAPTURE	_MMIO(0x420E0)
#define  MMIO_TIMEOUT_US(us)	((us) << 0)

/* interrupts */
@@ -2574,6 +2575,7 @@
#define GEN8_DE_MISC_IMR _MMIO(0x44464)
#define GEN8_DE_MISC_IIR _MMIO(0x44468)
#define GEN8_DE_MISC_IER _MMIO(0x4446c)
#define  XELPDP_RM_TIMEOUT		REG_BIT(29)
#define  XELPDP_PMDEMAND_RSPTOUT_ERR	REG_BIT(27)
#define  GEN8_DE_MISC_GSE		REG_BIT(27)
#define  GEN8_DE_EDP_PSR		REG_BIT(19)