Commit 7d80cc70 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2021-10-07' of... 

Merge tag 'drm-intel-fixes-2021-10-07' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

drm/i915 fixes for v5.15-rc5:
- Fix RKL HDMI audio
- Fix runtime pm imbalance on i915_gem_shrink() error path
- Fix Type-C port access before hw/sw state sync
- Fix VBT backlight struct version/size check
- Fix VT-d async flip on SKL/BXT with plane stretch workaround

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87k0ipywo4.fsf@intel.com
parents 9e1ff307 b2d73deb

drivers/gpu/drm/i915/display/icl_dsi.c

+8 −2
Original line number Diff line number Diff line
@@ -1577,8 +1577,14 @@ static void gen11_dsi_sync_state(struct intel_encoder *encoder, 
				 const struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);

	enum pipe pipe = intel_crtc->pipe;

	struct intel_crtc *intel_crtc;

	enum pipe pipe;



	if (!crtc_state)

		return;



	intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);

	pipe = intel_crtc->pipe;



	/* wa verify 1409054076:icl,jsl,ehl */

	if (DISPLAY_VER(dev_priv) == 11 && pipe == PIPE_B &&

drivers/gpu/drm/i915/display/intel_audio.c

+3 −2
Original line number Diff line number Diff line
@@ -1308,8 +1308,9 @@ static void i915_audio_component_init(struct drm_i915_private *dev_priv) 
		else

			aud_freq = aud_freq_init;



		/* use BIOS provided value for TGL unless it is a known bad value */

		if (IS_TIGERLAKE(dev_priv) && aud_freq_init != AUD_FREQ_TGL_BROKEN)

		/* use BIOS provided value for TGL and RKL unless it is a known bad value */

		if ((IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) &&

		    aud_freq_init != AUD_FREQ_TGL_BROKEN)

			aud_freq = aud_freq_init;



		drm_dbg_kms(&dev_priv->drm, "use AUD_FREQ_CNTRL of 0x%x (init value 0x%x)\n",

drivers/gpu/drm/i915/display/intel_bios.c

+16 −6
Original line number Diff line number Diff line
@@ -451,14 +451,24 @@ parse_lfp_backlight(struct drm_i915_private *i915, 
	}



	i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;

	if (bdb->version >= 191 &&

	    get_blocksize(backlight_data) >= sizeof(*backlight_data)) {

	if (bdb->version >= 191) {

		size_t exp_size;



		if (bdb->version >= 236)

			exp_size = sizeof(struct bdb_lfp_backlight_data);

		else if (bdb->version >= 234)

			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;

		else

			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;



		if (get_blocksize(backlight_data) >= exp_size) {

			const struct lfp_backlight_control_method *method;



			method = &backlight_data->backlight_control[panel_type];

			i915->vbt.backlight.type = method->type;

			i915->vbt.backlight.controller = method->controller;

		}

	}



	i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;

	i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;

drivers/gpu/drm/i915/display/intel_ddi.c

+7 −1
Original line number Diff line number Diff line
@@ -3807,7 +3807,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder, 
static void intel_ddi_sync_state(struct intel_encoder *encoder,

				 const struct intel_crtc_state *crtc_state)

{

	if (intel_crtc_has_dp_encoder(crtc_state))

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	enum phy phy = intel_port_to_phy(i915, encoder->port);



	if (intel_phy_is_tc(i915, phy))

		intel_tc_port_sanitize(enc_to_dig_port(encoder));



	if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))

		intel_dp_sync_state(encoder, crtc_state);

}

drivers/gpu/drm/i915/display/intel_display.c

+5 −15
Original line number Diff line number Diff line
@@ -13082,18 +13082,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) 
	readout_plane_state(dev_priv);



	for_each_intel_encoder(dev, encoder) {

		struct intel_crtc_state *crtc_state = NULL;



		pipe = 0;



		if (encoder->get_hw_state(encoder, &pipe)) {

			struct intel_crtc_state *crtc_state;



			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

			crtc_state = to_intel_crtc_state(crtc->base.state);



			encoder->base.crtc = &crtc->base;

			intel_encoder_get_config(encoder, crtc_state);

			if (encoder->sync_state)

				encoder->sync_state(encoder, crtc_state);



			/* read out to slave crtc as well for bigjoiner */

			if (crtc_state->bigjoiner) {
@@ -13108,6 +13106,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) 
			encoder->base.crtc = NULL;

		}



		if (encoder->sync_state)

			encoder->sync_state(encoder, crtc_state);



		drm_dbg_kms(&dev_priv->drm,

			    "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",

			    encoder->base.base.id, encoder->base.name,
@@ -13390,17 +13391,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev, 
	intel_modeset_readout_hw_state(dev);



	/* HW state is read out, now we need to sanitize this mess. */



	/* Sanitize the TypeC port mode upfront, encoders depend on this */

	for_each_intel_encoder(dev, encoder) {

		enum phy phy = intel_port_to_phy(dev_priv, encoder->port);



		/* We need to sanitize only the MST primary port. */

		if (encoder->type != INTEL_OUTPUT_DP_MST &&

		    intel_phy_is_tc(dev_priv, phy))

			intel_tc_port_sanitize(enc_to_dig_port(encoder));

	}



	get_encoder_power_domains(dev_priv);



	if (HAS_PCH_IBX(dev_priv))