Unverified Commit 7db44914 authored by Mark Brown's avatar Mark Brown
Browse files

Add SOF support for ACP7.0 based platform 

Merge series from Vijendar Mukunda <Vijendar.Mukunda@amd.com>:

This patch series adds SOF support for ACP7.0 based platform.

Link: https://github.com/thesofproject/linux/pull/5139
parents 6756d308 490be7ba

sound/soc/amd/acp-config.c

+12 −0
Original line number Diff line number Diff line
@@ -321,5 +321,17 @@ struct snd_soc_acpi_mach snd_soc_acpi_amd_acp63_sof_machines[] = { 
};

EXPORT_SYMBOL(snd_soc_acpi_amd_acp63_sof_machines);



struct snd_soc_acpi_mach snd_soc_acpi_amd_acp70_sof_machines[] = {

	{

		.id = "AMDI1010",

		.drv_name = "acp70-dsp",

		.pdata = &acp_quirk_data,

		.fw_filename = "sof-acp_7_0.ri",

		.sof_tplg_filename = "sof-acp_7_0.tplg",

	},

	{},

};

EXPORT_SYMBOL(snd_soc_acpi_amd_acp70_sof_machines);



MODULE_DESCRIPTION("AMD ACP Machine Configuration Module");

MODULE_LICENSE("Dual BSD/GPL");

sound/soc/amd/mach-config.h

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ extern struct snd_soc_acpi_mach snd_soc_acpi_amd_rmb_sof_machines[]; 
extern struct snd_soc_acpi_mach snd_soc_acpi_amd_vangogh_sof_machines[];

extern struct snd_soc_acpi_mach snd_soc_acpi_amd_acp63_sof_machines[];

extern struct snd_soc_acpi_mach snd_soc_acpi_amd_acp63_sof_sdw_machines[];

extern struct snd_soc_acpi_mach snd_soc_acpi_amd_acp70_sof_machines[];



struct config_entry {

	u32 flags;

sound/soc/sof/amd/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -88,4 +88,14 @@ config SND_SOC_SOF_AMD_ACP63 
	  AMD ACP6.3 version based platforms.

	  Say Y if you want to enable SOF on ACP6.3 based platform.

	  If unsure select "N".



config SND_SOC_SOF_AMD_ACP70

	tristate "SOF support for ACP7.0 platform"

	depends on SND_SOC_SOF_PCI

	select SND_SOC_SOF_AMD_COMMON

	help

	  Select this option for SOF support on

	  AMD ACP7.0 version based platforms.

	  Say Y if you want to enable SOF on ACP7.0 based platform.



endif

sound/soc/sof/amd/Makefile

+3 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
# This file is provided under a dual BSD/GPLv2 license. When using or

# redistributing this file, you may do so under either license.

#

# Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.

# Copyright(c) 2021, 2023, 2024 Advanced Micro Devices, Inc. All rights reserved.



snd-sof-amd-acp-y := acp.o acp-loader.o acp-ipc.o acp-pcm.o acp-stream.o acp-trace.o acp-common.o

snd-sof-amd-acp-$(CONFIG_SND_SOC_SOF_ACP_PROBES) += acp-probes.o
@@ -10,9 +10,11 @@ snd-sof-amd-renoir-y := pci-rn.o renoir.o 
snd-sof-amd-rembrandt-y := pci-rmb.o rembrandt.o

snd-sof-amd-vangogh-y := pci-vangogh.o vangogh.o

snd-sof-amd-acp63-y := pci-acp63.o acp63.o

snd-sof-amd-acp70-y := pci-acp70.o acp70.o



obj-$(CONFIG_SND_SOC_SOF_AMD_COMMON) += snd-sof-amd-acp.o

obj-$(CONFIG_SND_SOC_SOF_AMD_RENOIR) += snd-sof-amd-renoir.o

obj-$(CONFIG_SND_SOC_SOF_AMD_REMBRANDT) += snd-sof-amd-rembrandt.o

obj-$(CONFIG_SND_SOC_SOF_AMD_VANGOGH) += snd-sof-amd-vangogh.o

obj-$(CONFIG_SND_SOC_SOF_AMD_ACP63) += snd-sof-amd-acp63.o

obj-$(CONFIG_SND_SOC_SOF_AMD_ACP70) += snd-sof-amd-acp70.o

sound/soc/sof/amd/acp-dsp-offset.h

+23 −1
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ 
 * This file is provided under a dual BSD/GPLv2 license. When using or

 * redistributing this file, you may do so under either license.

 *

 * Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.

 * Copyright(c) 2021, 2023, 2024 Advanced Micro Devices, Inc. All rights reserved.

 *

 * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>

 */
@@ -23,6 +23,17 @@ 
#define ACP_DMA_CH_STS				0xE8

#define ACP_DMA_CH_GROUP			0xEC

#define ACP_DMA_CH_RST_STS			0xF0

#define ACP70_DMA_CNTL_0			0x00

#define ACP70_DMA_DSCR_STRT_IDX_0		0x28

#define ACP70_DMA_DSCR_CNT_0			0x50

#define ACP70_DMA_PRIO_0			0x78

#define ACP70_DMA_CUR_DSCR_0			0xA0

#define ACP70_DMA_ERR_STS_0			0xF0

#define ACP70_DMA_DESC_BASE_ADDR		0x118

#define ACP70_DMA_DESC_MAX_NUM_DSCR		0x11C

#define ACP70_DMA_CH_STS			0x120

#define ACP70_DMA_CH_GROUP			0x124

#define ACP70_DMA_CH_RST_STS			0x128



/* Registers from ACP_DSP_0 block */

#define ACP_DSP0_RUNSTALL			0x414
@@ -56,11 +67,13 @@ 
#define ACP3X_PGFSM_BASE			0x141C

#define ACP5X_PGFSM_BASE			0x1424

#define ACP6X_PGFSM_BASE                        0x1024

#define ACP70_PGFSM_BASE                        ACP6X_PGFSM_BASE

#define PGFSM_CONTROL_OFFSET			0x0

#define PGFSM_STATUS_OFFSET			0x4

#define ACP3X_CLKMUX_SEL			0x1424

#define ACP5X_CLKMUX_SEL			0x142C

#define ACP6X_CLKMUX_SEL			0x102C

#define ACP70_CLKMUX_SEL			ACP6X_CLKMUX_SEL



/* Registers from ACP_INTR block */

#define ACP3X_EXT_INTR_STAT			0x1808
@@ -69,22 +82,30 @@ 
#define ACP6X_EXTERNAL_INTR_CNTL		0x1A04

#define ACP6X_EXT_INTR_STAT                     0x1A0C

#define ACP6X_EXT_INTR_STAT1			0x1A10

#define ACP70_EXTERNAL_INTR_ENB			ACP6X_EXTERNAL_INTR_ENB

#define ACP70_EXTERNAL_INTR_CNTL		ACP6X_EXTERNAL_INTR_CNTL

#define ACP70_EXT_INTR_STAT			ACP6X_EXT_INTR_STAT

#define ACP70_EXT_INTR_STAT1			ACP6X_EXT_INTR_STAT1



#define ACP3X_DSP_SW_INTR_BASE			0x1814

#define ACP5X_DSP_SW_INTR_BASE			0x1814

#define ACP6X_DSP_SW_INTR_BASE                  0x1808

#define ACP70_DSP_SW_INTR_BASE			ACP6X_DSP_SW_INTR_BASE

#define DSP_SW_INTR_CNTL_OFFSET			0x0

#define DSP_SW_INTR_STAT_OFFSET			0x4

#define DSP_SW_INTR_TRIG_OFFSET			0x8

#define ACP3X_ERROR_STATUS			0x18C4

#define ACP6X_ERROR_STATUS			0x1A4C

#define ACP70_ERROR_STATUS			ACP6X_ERROR_STATUS

#define ACP3X_AXI2DAGB_SEM_0			0x1880

#define ACP5X_AXI2DAGB_SEM_0			0x1884

#define ACP6X_AXI2DAGB_SEM_0			0x1874

#define ACP70_AXI2DAGB_SEM_0			ACP6X_AXI2DAGB_SEM_0



/* ACP common registers to report errors related to I2S & SoundWire interfaces */

#define ACP3X_SW_I2S_ERROR_REASON		0x18C8

#define ACP6X_SW0_I2S_ERROR_REASON		0x18B4

#define ACP7X_SW0_I2S_ERROR_REASON		ACP6X_SW0_I2S_ERROR_REASON

#define ACP_SW1_I2S_ERROR_REASON		0x1A50



/* Registers from ACP_SHA block */
@@ -101,6 +122,7 @@ 


#define ACP_SCRATCH_REG_0			0x10000

#define ACP6X_DSP_FUSION_RUNSTALL		0x0644

#define ACP70_DSP_FUSION_RUNSTALL		ACP6X_DSP_FUSION_RUNSTALL



/* Cache window registers */

#define ACP_DSP0_CACHE_OFFSET0			0x0420