Commit 7debb6bb authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Dmitry Baryshkov
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drm/msm/dpu: remove DPU_DSPP_IGC handling in dspp flush 



Inverse gamma correction blocks (IGC) are not used today so lets
remove the usage of DPU_DSPP_IGC in the DSPP flush to make it easier
to remove IGC from the catalog.

We can add this back when IGC is properly supported in DPU with
one of the standard DRM properties.

changes in v3:
	- minor change dspp -> DSPP in commit text

Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/534724/
Link: https://lore.kernel.org/r/20230428223646.23595-2-quic_abhinavk@quicinc.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 198d8c9c

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

+0 −3
Original line number Diff line number Diff line
@@ -313,9 +313,6 @@ static void dpu_hw_ctl_update_pending_flush_dspp_sub_blocks( 
		return;



	switch (dspp_sub_blk) {

	case DPU_DSPP_IGC:

		ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(2);

		break;

	case DPU_DSPP_PCC:

		ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4);

		break;