Commit 7e3ec628 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

x86/cpu/amd: Provide a separate accessor for Node ID 



AMD (ab)uses topology_die_id() to store the Node ID information and
topology_max_dies_per_pkg to store the number of nodes per package.

This collides with the proper processor die level enumeration which is
coming on AMD with CPUID 8000_0026, unless there is a correlation between
the two. There is zero documentation about that.

So provide new storage and new accessors which for now still access die_id
and topology_max_die_per_pkg(). Will be mopped up after AMD and HYGON are
converted over.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarJuergen Gross <jgross@suse.com>
Tested-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Tested-by: default avatarMichael Kelley <mhklinux@outlook.com>
Tested-by: default avatarZhang Rui <rui.zhang@intel.com>
Tested-by: default avatarWang Wendy <wendy.wang@intel.com>
Tested-by: default avatarK Prateek Nayak <kprateek.nayak@amd.com>
Link: https://lore.kernel.org/r/20240212153624.956116738@linutronix.de
parent 22d63660

arch/x86/events/amd/core.c

+1 −1
Original line number Diff line number Diff line
@@ -579,7 +579,7 @@ static void amd_pmu_cpu_starting(int cpu) 
	if (!x86_pmu.amd_nb_constraints)

		return;



	nb_id = topology_die_id(cpu);

	nb_id = topology_amd_node_id(cpu);

	WARN_ON_ONCE(nb_id == BAD_APICID);



	for_each_online_cpu(i) {

arch/x86/include/asm/processor.h

+3 −0
Original line number Diff line number Diff line
@@ -100,6 +100,9 @@ struct cpuinfo_topology { 
	u32			logical_pkg_id;

	u32			logical_die_id;



	// AMD Node ID and Nodes per Package info

	u32			amd_node_id;



	// Cache level topology IDs

	u32			llc_id;

	u32			l2c_id;

arch/x86/include/asm/topology.h

+8 −0
Original line number Diff line number Diff line
@@ -131,6 +131,8 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu); 
#define topology_core_id(cpu)			(cpu_data(cpu).topo.core_id)

#define topology_ppin(cpu)			(cpu_data(cpu).ppin)



#define topology_amd_node_id(cpu)		(cpu_data(cpu).topo.die_id)



extern unsigned int __max_die_per_package;



#ifdef CONFIG_SMP
@@ -161,6 +163,11 @@ int topology_update_package_map(unsigned int apicid, unsigned int cpu); 
int topology_update_die_map(unsigned int dieid, unsigned int cpu);

int topology_phys_to_logical_pkg(unsigned int pkg);



static inline unsigned int topology_amd_nodes_per_pkg(void)

{

	return __max_die_per_package;

}



extern struct cpumask __cpu_primary_thread_mask;

#define cpu_primary_thread_mask ((const struct cpumask *)&__cpu_primary_thread_mask)
@@ -182,6 +189,7 @@ static inline int topology_phys_to_logical_pkg(unsigned int pkg) { return 0; } 
static inline int topology_max_die_per_package(void) { return 1; }

static inline int topology_max_smt_threads(void) { return 1; }

static inline bool topology_is_primary_thread(unsigned int cpu) { return true; }

static inline unsigned int topology_amd_nodes_per_pkg(void) { return 0; };

#endif /* !CONFIG_SMP */



static inline void arch_fix_phys_package_id(int num, u32 slot)

arch/x86/kernel/amd_nb.c

+2 −2
Original line number Diff line number Diff line
@@ -386,7 +386,7 @@ struct resource *amd_get_mmconfig_range(struct resource *res) 


int amd_get_subcaches(int cpu)

{

	struct pci_dev *link = node_to_amd_nb(topology_die_id(cpu))->link;

	struct pci_dev *link = node_to_amd_nb(topology_amd_node_id(cpu))->link;

	unsigned int mask;



	if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
@@ -400,7 +400,7 @@ int amd_get_subcaches(int cpu) 
int amd_set_subcaches(int cpu, unsigned long mask)

{

	static unsigned int reset, ban;

	struct amd_northbridge *nb = node_to_amd_nb(topology_die_id(cpu));

	struct amd_northbridge *nb = node_to_amd_nb(topology_amd_node_id(cpu));

	unsigned int reg;

	int cuid;

arch/x86/kernel/cpu/cacheinfo.c

+1 −1
Original line number Diff line number Diff line
@@ -595,7 +595,7 @@ static void amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index) 
	if (index < 3)

		return;



	node = topology_die_id(smp_processor_id());

	node = topology_amd_node_id(smp_processor_id());

	this_leaf->nb = node_to_amd_nb(node);

	if (this_leaf->nb && !this_leaf->nb->l3_cache.indices)

		amd_calc_l3_indices(this_leaf->nb);