Commit 7ed7a576 authored by Dragos Tatulea's avatar Dragos Tatulea Committed by Jakub Kicinski
Browse files

net/mlx5e: RX, Drop oversized packets in non-linear mode 



Currently the driver has an inconsistent behaviour between modes when it
comes to oversized packets that are not dropped through the physical MTU
check in HW. This can happen for Multi Host configurations where each
port has a different MTU.

Current behavior:

1) Striding RQ in linear mode drops the packet in SW and counts it
   with oversize_pkts_sw_drop.

2) Striding RQ in non-linear mode allows it like a normal packet.

3) Legacy RQ can't receive oversized packets by design:
   the RX WQE uses MTU sized packet buffers.

This inconsistency is not a violation of the netdev policy [1]
but it is better to be consistent across modes.

This patch aligns (2) with (1) and (3). One exception is added for
LRO: don't drop the oversized packet if it is an LRO packet.

As now rq->hw_mtu always needs to be updated during the MTU change flow,
drop the reset avoidance optimization from mlx5e_change_mtu().

Extract the CQE LRO segments reading into a helper function as it
is used twice now.

[1] Documentation/networking/netdevices.rst#L205

Signed-off-by: default avatarDragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Reviewed-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Link: https://patch.msgid.link/20260203072130.1710255-2-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 14eb64db

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+2 −23
Original line number Diff line number Diff line
@@ -4716,7 +4716,6 @@ int mlx5e_change_mtu(struct net_device *netdev, int new_mtu, 
	struct mlx5e_priv *priv = netdev_priv(netdev);

	struct mlx5e_params new_params;

	struct mlx5e_params *params;

	bool reset = true;

	int err = 0;



	mutex_lock(&priv->state_lock);
@@ -4742,28 +4741,8 @@ int mlx5e_change_mtu(struct net_device *netdev, int new_mtu, 
		goto out;

	}



	if (params->packet_merge.type == MLX5E_PACKET_MERGE_LRO)

		reset = false;



	if (params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&

	    params->packet_merge.type != MLX5E_PACKET_MERGE_SHAMPO) {

		bool is_linear_old = mlx5e_rx_mpwqe_is_linear_skb(priv->mdev, params, NULL);

		bool is_linear_new = mlx5e_rx_mpwqe_is_linear_skb(priv->mdev,

								  &new_params, NULL);

		u8 sz_old = mlx5e_mpwqe_get_log_rq_size(priv->mdev, params, NULL);

		u8 sz_new = mlx5e_mpwqe_get_log_rq_size(priv->mdev, &new_params, NULL);



		/* Always reset in linear mode - hw_mtu is used in data path.

		 * Check that the mode was non-linear and didn't change.

		 * If XSK is active, XSK RQs are linear.

		 * Reset if the RQ size changed, even if it's non-linear.

		 */

		if (!is_linear_old && !is_linear_new && !priv->xsk.refcnt &&

		    sz_old == sz_new)

			reset = false;

	}



	err = mlx5e_safe_switch_params(priv, &new_params, preactivate, NULL, reset);

	err = mlx5e_safe_switch_params(priv, &new_params, preactivate, NULL,

				       true);



out:

	WRITE_ONCE(netdev->mtu, params->sw_mtu);

drivers/net/ethernet/mellanox/mlx5/core/en_rx.c

+10 −1
Original line number Diff line number Diff line
@@ -1574,7 +1574,7 @@ static inline bool mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe, 
				      struct mlx5e_rq *rq,

				      struct sk_buff *skb)

{

	u8 lro_num_seg = be32_to_cpu(cqe->srqn) >> 24;

	u8 lro_num_seg = get_cqe_lro_num_seg(cqe);

	struct mlx5e_rq_stats *stats = rq->stats;

	struct net_device *netdev = rq->netdev;
@@ -2058,6 +2058,15 @@ mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *w 
	u16 linear_hr;

	void *va;



	if (unlikely(cqe_bcnt > rq->hw_mtu)) {

		u8 lro_num_seg = get_cqe_lro_num_seg(cqe);



		if (lro_num_seg <= 1) {

			rq->stats->oversize_pkts_sw_drop++;

			return NULL;

		}

	}



	prog = rcu_dereference(rq->xdp_prog);



	if (prog) {

include/linux/mlx5/device.h

+5 −0
Original line number Diff line number Diff line
@@ -962,6 +962,11 @@ static inline u16 get_cqe_flow_tag(struct mlx5_cqe64 *cqe) 
	return be32_to_cpu(cqe->sop_drop_qpn) & 0xFFF;

}



static inline u8 get_cqe_lro_num_seg(struct mlx5_cqe64 *cqe)

{

	return be32_to_cpu(cqe->srqn) >> 24;

}



#define MLX5_MPWQE_LOG_NUM_STRIDES_EXT_BASE	3

#define MLX5_MPWQE_LOG_NUM_STRIDES_BASE		9

#define MLX5_MPWQE_LOG_NUM_STRIDES_MAX		16