Loading arch/arm/mach-shmobile/Kconfig +4 −0 Original line number Diff line number Diff line Loading @@ -100,6 +100,10 @@ config MACH_MARZEN comment "SH-Mobile System Configuration" config CPU_HAS_INTEVT bool default y menu "Memory configuration" config MEMORY_START Loading arch/arm/mach-shmobile/include/mach/irqs.h +2 −4 Original line number Diff line number Diff line #ifndef __ASM_MACH_IRQS_H #define __ASM_MACH_IRQS_H #include <linux/sh_intc.h> #define NR_IRQS 1024 /* GIC */ #define gic_spi(nr) ((nr) + 32) /* INTCA */ #define evt2irq(evt) (((evt) >> 5) - 16) #define irq2evt(irq) (((irq) + 16) << 5) /* INTCS */ #define INTCS_VECT_BASE 0x2200 #define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect)) Loading arch/sh/include/asm/irq.h +0 −11 Original line number Diff line number Diff line Loading @@ -20,17 +20,6 @@ */ #define NO_IRQ_IGNORE ((unsigned int)-1) /* * Convert back and forth between INTEVT and IRQ values. */ #ifdef CONFIG_CPU_HAS_INTEVT #define evt2irq(evt) (((evt) >> 5) - 16) #define irq2evt(irq) (((irq) + 16) << 5) #else #define evt2irq(evt) (evt) #define irq2evt(irq) (irq) #endif /* * Simple Mask Register Support */ Loading include/linux/sh_intc.h +11 −0 Original line number Diff line number Diff line Loading @@ -3,6 +3,17 @@ #include <linux/ioport.h> /* * Convert back and forth between INTEVT and IRQ values. */ #ifdef CONFIG_CPU_HAS_INTEVT #define evt2irq(evt) (((evt) >> 5) - 16) #define irq2evt(irq) (((irq) + 16) << 5) #else #define evt2irq(evt) (evt) #define irq2evt(irq) (irq) #endif typedef unsigned char intc_enum; struct intc_vect { Loading Loading
arch/arm/mach-shmobile/Kconfig +4 −0 Original line number Diff line number Diff line Loading @@ -100,6 +100,10 @@ config MACH_MARZEN comment "SH-Mobile System Configuration" config CPU_HAS_INTEVT bool default y menu "Memory configuration" config MEMORY_START Loading
arch/arm/mach-shmobile/include/mach/irqs.h +2 −4 Original line number Diff line number Diff line #ifndef __ASM_MACH_IRQS_H #define __ASM_MACH_IRQS_H #include <linux/sh_intc.h> #define NR_IRQS 1024 /* GIC */ #define gic_spi(nr) ((nr) + 32) /* INTCA */ #define evt2irq(evt) (((evt) >> 5) - 16) #define irq2evt(irq) (((irq) + 16) << 5) /* INTCS */ #define INTCS_VECT_BASE 0x2200 #define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect)) Loading
arch/sh/include/asm/irq.h +0 −11 Original line number Diff line number Diff line Loading @@ -20,17 +20,6 @@ */ #define NO_IRQ_IGNORE ((unsigned int)-1) /* * Convert back and forth between INTEVT and IRQ values. */ #ifdef CONFIG_CPU_HAS_INTEVT #define evt2irq(evt) (((evt) >> 5) - 16) #define irq2evt(irq) (((irq) + 16) << 5) #else #define evt2irq(evt) (evt) #define irq2evt(irq) (irq) #endif /* * Simple Mask Register Support */ Loading
include/linux/sh_intc.h +11 −0 Original line number Diff line number Diff line Loading @@ -3,6 +3,17 @@ #include <linux/ioport.h> /* * Convert back and forth between INTEVT and IRQ values. */ #ifdef CONFIG_CPU_HAS_INTEVT #define evt2irq(evt) (((evt) >> 5) - 16) #define irq2evt(irq) (((irq) + 16) << 5) #else #define evt2irq(evt) (evt) #define irq2evt(irq) (irq) #endif typedef unsigned char intc_enum; struct intc_vect { Loading