Commit 7f224967 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Martin K. Petersen
Browse files

scsi: ufs: qcom: dt-bindings: Split common part to qcom,ufs-common.yaml 



The binding for Qualcomm SoC UFS controllers grew and it will grow
further.  It already includes several conditionals, partially for
difference in handling encryption block (ICE, either as phandle or as
I/O address space) but it will further grow for MCQ.

Prepare for splitting this one big binding into several ones for common
group of devices by defining common part for all Qualcomm UFS schemas.

This only moves code, no functional impact expected.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-1-53bb634bf95a@linaro.org


Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 8f5ae30d

Documentation/devicetree/bindings/ufs/qcom,ufs-common.yaml

0 → 100644
+67 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/ufs/qcom,ufs-common.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Universal Flash Storage (UFS) Controller Common Properties



maintainers:

  - Bjorn Andersson <bjorn.andersson@linaro.org>



properties:

  clocks:

    minItems: 7

    maxItems: 9



  clock-names:

    minItems: 7

    maxItems: 9



  dma-coherent: true



  interconnects:

    minItems: 2

    maxItems: 2



  interconnect-names:

    items:

      - const: ufs-ddr

      - const: cpu-ufs



  iommus:

    minItems: 1

    maxItems: 2



  phys:

    maxItems: 1



  phy-names:

    items:

      - const: ufsphy



  power-domains:

    maxItems: 1



  required-opps:

    maxItems: 1



  resets:

    maxItems: 1



  '#reset-cells':

    const: 1



  reset-names:

    items:

      - const: rst



  reset-gpios:

    maxItems: 1

    description:

      GPIO connected to the RESET pin of the UFS memory device.



allOf:

  - $ref: ufs-common.yaml



additionalProperties: true

Documentation/devicetree/bindings/ufs/qcom,ufs.yaml

+1 −52
Original line number Diff line number Diff line
@@ -47,39 +47,6 @@ properties: 
      - const: qcom,ufshc

      - const: jedec,ufs-2.0



  clocks:

    minItems: 7

    maxItems: 9



  clock-names:

    minItems: 7

    maxItems: 9



  dma-coherent: true



  interconnects:

    minItems: 2

    maxItems: 2



  interconnect-names:

    items:

      - const: ufs-ddr

      - const: cpu-ufs



  iommus:

    minItems: 1

    maxItems: 2



  phys:

    maxItems: 1



  phy-names:

    items:

      - const: ufsphy



  power-domains:

    maxItems: 1



  qcom,ice:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: phandle to the Inline Crypto Engine node
@@ -93,30 +60,12 @@ properties: 
      - const: std

      - const: ice



  required-opps:

    maxItems: 1



  resets:

    maxItems: 1



  '#reset-cells':

    const: 1



  reset-names:

    items:

      - const: rst



  reset-gpios:

    maxItems: 1

    description:

      GPIO connected to the RESET pin of the UFS memory device.



required:

  - compatible

  - reg



allOf:

  - $ref: ufs-common.yaml

  - $ref: qcom,ufs-common.yaml



  - if:

      properties: